AT24C08AN-10SU-2.7 Atmel, AT24C08AN-10SU-2.7 Datasheet - Page 3

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AT24C08AN-10SU-2.7

Manufacturer Part Number
AT24C08AN-10SU-2.7
Description
Manufacturer
Atmel
Datasheet

Specifications of AT24C08AN-10SU-2.7

Density
8Kb
Interface Type
Serial (2-Wire)
Organization
1Kx8
Access Time (max)
900ns
Frequency (max)
400KHz
Write Protection
Yes
Data Retention
100Year
Operating Supply Voltage (typ)
3.3/5V
Package Type
SOIC
Operating Temp Range
-40C to 85C
Supply Current
3mA
Operating Supply Voltage (min)
2.7V
Operating Supply Voltage (max)
5.5V
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
8
Lead Free Status / RoHS Status
Compliant

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Memory Organization
Pin Capacitance
Applicable over recommended operating range from T
Note:
0976L–SEEPR–1/04
Symbol
C
C
I/O
IN
1. This parameter is characterized and is not 100% tested.
Test Condition
Input/Output Capacitance (SDA)
Input Capacitance (A
The AT24C08A only uses the A2 input for hardwire addressing and a total of two 8K
devices may be addressed on a single bus system. The A0 and A1 pins are no-
connects.
The AT24C16A does not use the device address pins, which limits the number of
devices on a single bus to one. The A0, A1 and A2 pins are no-connects.
WRITE PROTECT (WP): The AT24C02A/04A/08A/16A have a Write Protect pin that
provides hardware data protection. The Write Protect pin allows normal read/write oper-
ations when connected to ground (GND). When the Write Protect pin is connected to
V
table.
AT24C02A, 2K SERIAL EEPROM: Internally organized with 32 pages of 8 bytes each,
the 2K requires an 8-bit data word address for random word addressing.
AT24C04A, 4K SERIAL EEPROM: The 4K is internally organized with 32 pages of 16
bytes each. Random word addressing requires a 9-bit data word address.
AT24C08A, 8K SERIAL EEPROM: The 8K is internally organized with 64 pages of 16
bytes each. Random word addressing requires a 10-bit data word address.
AT24C16A, 16K SERIAL EEPROM: The 16K is internally organized with 128 pages of
16 bytes each. Random word addressing requires an 11-bit data word address.
0
, A
WP Pin Status
At V
At GND
CC
1
, the write protection feature is enabled and operates as shown in the following
, A
CC
2
, SCL)
A
= 25 C, f = 1.0 MHz, V
Normal Read/Write Operations
Upper Half
(1K) Array
24C02A
Max
Upper Half
(2K) Array
24C04A
8
6
Part of the Array Protected
AT24C02A/04A/08A/16A
CC
= +1.8V.
Units
pF
pF
Full (8K)
24C08A
Array
Conditions
V
V
I/O
IN
Full (16K)
24C16A
= 0V
Array
= 0V
3

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