CY7C4225-15ASC Cypress Semiconductor Corp, CY7C4225-15ASC Datasheet - Page 14

CY7C4225-15ASC

Manufacturer Part Number
CY7C4225-15ASC
Description
Manufacturer
Cypress Semiconductor Corp
Datasheet

Specifications of CY7C4225-15ASC

Configuration
Dual
Density
18Kb
Access Time (max)
10ns
Word Size
18b
Organization
1Kx18
Sync/async
Synchronous
Expandable
Yes
Bus Direction
Uni-Directional
Package Type
TQFP
Clock Freq (max)
66.7MHz
Operating Supply Voltage (typ)
5V
Operating Supply Voltage (min)
4.5V
Operating Supply Voltage (max)
5.5V
Supply Current
45mA
Operating Temp Range
0C to 70C
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Pin Count
64
Lead Free Status / RoHS Status
Not Compliant
Switching Waveforms
Notes:
Document Number: 001-45652 Rev. **
24. PAE offset − n. Number of data words into FIFO already = n.
25. PAE offset − n.
26. t
27. If a read is performed on this rising edge of the read clock, there will be Empty + (n−1) words in the FIFO when PAE goes LOW.
and the rising RCLK is less than t
SKEW3
PAE
WEN
WCLK
WCLK
RCLK
RCLK
is the minimum time between a rising WCLK and a rising RCLK edge for PAE to change state during that clock cycle. If the time between the edge of WCLK
WEN
REN
REN
PAE
[24]
Figure 14. Programmable Almost Empty Flag Timing (applies only in SMODE (SMODE is LOW)
t
CLKH
SKEW3
(continued)
, then PAE may not change state until the next RCLK.
t
SKEW3
Figure 13. Programmable Almost Empty Flag Timing
t
CLKH
t
ENS
[26]
t
ENH
t
CLKL
Note 25
t
ENS
t
ENH
t
t
PAEsynch
CLKL
t
PAE
t
t
ENS
ENS
n+1 WORDS
N + 1 WORDS
IN FIFO
INFIFO
t
ENS
t
PAE
t
ENH
CY7C4425/4205/4215
CY7C4225/4235/4245
n WORDS IN FIFO
Note 27
t
PAEsynch
Page 14 of 22
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