STK12C68-L35IM Cypress Semiconductor Corp, STK12C68-L35IM Datasheet
STK12C68-L35IM
Specifications of STK12C68-L35IM
Related parts for STK12C68-L35IM
STK12C68-L35IM Summary of contents
Page 1
... Nonvolatile Static RAM DESCRIPTION The Simtek STK12C68- fast static and 45ns), with a nonvolatile porated in each static memory cell. The read and written an unlimited number of times, while on Power Down independent nonvolatile data resides in to STORE transfers from the ) take place automatically upon power down operation using charge stored in an external 100 F capacitor ...
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... STK12C68-IM ABSOLUTE MAXIMUM RATINGS Voltage on typical input relative –0.6V to 7.0V SS Voltage on DQ and .–0. 0-7 Temperature under bias . . . . . . . . . . . . . . . . . . . . . . – 125 C Storage temperature – 150 C Power dissipation .1W DC output current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .15mA (One output at a time, one second duration) DC CHARACTERISTICS SYMBOL PARAMETER b I Average V ...
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... ELICCH ACTIVE I STANDBY CC SRAM MEMORY OPERATION STK12C68-25-IM PARAMETER MIN AVAV 3 t AVQV 5 t AXQX 2 t AVAV 1 t ELQV 6 t ELQX 4 t GLQV 8 t GLQX 43 STK12C68- 5.0V CC STK12C68-35-IM STK12C68-45-IM MAX MIN MAX MIN MAX DATA VALID 11 t EHICCL 7 t EHQZ 9 t GHQZ ...
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... DATA OUT STK12C68-25-IM PARAMETER MIN AVAV 14 t ELWH 17 t AVWH 13 t WLWH 20 t WLQZ AVAV 14 t ELEH 17 t AVEH 13 t WLEH HIGH IMPEDANCE 5.0V CC STK12C68-35-IM STK12C68-45-IM MAX MIN MAX MIN MAX WHAX DVWH WHDX DATA VALID 21 t WHQX HIGH IMPEDANCE 19 t EHAX ...
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... Note e: These parameters guaranteed but not tested. Note n: HSB is an I/O that has a weak internal pullup basically an open drain output meant to allow STK12C68-IMs to be ganged together for simultaneous storing. Do not use HSB to pullup any external circuitry other than other STK12C68 HSB pins. ...
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... Note s: W must be HIGH when E is LOW during the address sequence in order to initiate a nonvolatile cycle. G may be either HIGH or LOW throughout. Addresses #1 through #6 are found in the MODE SELECTION table. Address #6 determines whether the STK12C68-IM performs a STORE or RECALL . E must be used to clock in the address sequence for the Software STORE and RECALL cycles. ...
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... The STK12C68-IM has two separate modes of opera- tion: mode and nonvolatile mode. In SRAM mode, the memory operates as a standard fast static . In nonvolatile mode, data is transferred from RAM to (the SRAM EEPROM STORE to (the operation). In this mode EEPROM SRAM RECALL functions are disabled. ...
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... CAP voltage cycle will automatically RECALL SWITCH be initiated. If the STK12C68- WRITE state at the end of power-up , the SRAM data will be corrupted. RECALL To help avoid this situation, a 10K Ohm resistor should be connected between W and system V HARDWARE PROTECT The STK12C68-IM offers hardware protection against inadvertent STORE operation conditions ...
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... V , the part will stop trying to pull HSB IL abort the AutoStore ™attempt. LOW AVERAGE ACTIVE POWER The STK12C68-IM has been designed to draw signifi- cantly less power when E is (chip enabled) but the LOW access cycle time is longer than 55ns. Figure 2 below ...
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... STK12C68-IM STK12C68 - ORDERING INFORMATION Temperature Range IM = Industrial (-40 to +85 C) with Military Screening Access Time 25 = 25ns 35 = 35ns 45 = 45ns Package C = Ceramic 28 pin 300 mil DIP with Gold Lead Finish K = Ceramic 28 pin 300 mil DIP with Solder DIP L = Ceramic 28 pin LCC 50 ...