5962-8751410XA QP SEMICONDUCTOR, 5962-8751410XA Datasheet - Page 22

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5962-8751410XA

Manufacturer Part Number
5962-8751410XA
Description
Manufacturer
QP SEMICONDUCTOR
Datasheet

Specifications of 5962-8751410XA

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DSCC FORM 2234
APR 97
The following additional criteria shall apply.
waveforms and timing relationships shown on figure 5 (per appropriate device type) and the conditions specified in table I shall
be adhered to. Information is introduced by selectively programming a TTL low or TTL high on each I/O of the address desired.
verifying the pattern used.
erased to a TTL high.
4.4.2 Read mode operation. The waveforms and timing relationships shown on figure 4 and the conditions specified in table I
shall be applied when reading the device. Pattern verification utilizes the read mode.
Functionality shall be verified at all temperatures (group A, subgroups 7 and 8) by programming all bytes of each device and
4.3.2 Group C inspection. The group C inspection end-point electrical parameters shall be as specified in table IIA herein.
4.3.3 Group D inspection. The group D inspection end-point electrical parameters shall be as specified in table II herein.
4.4 Programming procedure. The following procedure shall be followed when programming (Write) is performed. The
4.4.1 Erasing procedure. There are two forms of erasure, chip and byte, whereby all bits or the address selected will be
a. Chip erase is performed in accordance with the waveforms and timing relationships shown on figure 8 (in accordance
b. Byte erase is performed in accordance with the waveforms and timing relationships shown on figure 5 (in accordance
a. End-point electrical parameters shall be as specified in table II herein.
b. Steady-state life test conditions, method 1005 of MIL-STD-883.
with appropriate device type) and the conditions specified in table I.
with appropriate device type) and the conditions specified in table I.
(1) Test condition D. The test circuit shall be maintained by the manufacturer under document revision level control
(2) T
(3) Test duration: 1,000 hours, except as permitted by method 1005 of MIL-STD-883.
DEFENSE SUPPLY CENTER COLUMBUS
and shall be made available to the preparing or acquiring activity upon request. The test circuit shall specify the
inputs, outputs, biases, and power dissipation, as applicable, in accordance with the intent specified in method
1005 of MIL-STD-883.
MICROCIRCUIT DRAWING
A
COLUMBUS, OHIO 43218-3990
= +125°C, minimum.
STANDARD
1/
2/
3/
4/
5/
Interim electrical parameters
Final electrical test parameters
Group A test requirements
Groups C and D end-point electrical
parameters (method 5005)
(method 5004)
(method 5004)
(method 5005)
Any or all subgroups may be combined when using multifunction testers.
For all electrical tests, the device shall be programmed to the data pattern specified.
(*) Indicates PDA applies to subgroups 1 and 7.
Subgroups 7 and 8 shall consist of writing and reading the data pattern specified
(**) Indicates that subgroup 4 will only be performed during initial qualification and after design
or process changes (see 4.3.1c).
in accordance with the limits of table I subgroups 9, 10, and 11.
MIL-STD-883 test requirements
TABLE II. Electrical test requirements.
SIZE
A
MIL-STD-883, method
(in accordance with
8, 9, 10, 11 4/ 5/
Subgroups 1/ 2/
1*, 2, 3, 7*, 8,
1, 2, 3, 4**, 7,
5005, table I)
9, 10, 11
8, 9, 10, 11
1, 2, 3, 7,
2, 8A, 10
REVISION LEVEL
1, 7, 9,
or
3/
F
SHEET
5962-87514
22

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