FDC37B787-NS Standard Microsystems (SMSC), FDC37B787-NS Datasheet - Page 151

• Manufacturer Part Number: FDC37B787-NS
• Manufacturer: Standard Microsystems (SMSC)

Specifications of FDC37B787-NS

• Pin Count: 128
• Lead Free Status / RoHS Status: Compliant

General Purpose ACPI Events
The General Purpose ACPI events are enabled
through the SCI_EN1 bit in the GPE_EN register.
This bit, if set, allows any of the enabled PME
events to generate an SCI. In addition, if the
DEVINT_EN bit in the PME_EN 1 Register is set,
and if the EN_SMI_PME bit in the SMI_EN 2
register is set, then any of the SMI Events can
also generate an SCI. See the SCI/PME and
SMI/PME logic diagrams below.
Device Sleep States
Each device in the FDC37B78x supports two
device sleep states, D0 (on) and D3 (off). The
D3 state corresponds to the PCI defined D3cold
state. With all devices off, the part is powered
Note 1: These SCI/PME events are SMI events that are enabled through DEVINT_EN
Note 2: These SCI events have Status and Enable bits in the PM1 registers
The following are SMI events that are not wake events:
•
•
•
•
Any wakeup logic that affects the configuration of the wakeup events is implemented so that the
configuration of the wakeup events is retained (in the event of total power loss) upon Vtr POR.
Internal
Signals
Pins
Floppy Interrupt
Parallel Port Interrupt
WDT
P12
KCLK
MCLK
IRRX2 (Includes CIR)
RXD2/IRRX (Includes CIR)
(CIR)
RXD1
nRI1
nRI2
nRING
Button
GP10-17
GP50-54, GP60-67
RTC Alarm (includes AL_REM)
VTR POR
WAKE EVENTS
153
KCLK
MCLK
RXD2/IRRX
CIR
RXD1
nRI1
nRI2
nRING
Button
GPINT1
GPINT2
RTC Alarm + AL_REM
VTR POR
IRRX2
INPUT TO SOFT POWER
either by main power (Vcc) or standby power
(Vtr), depending on the system sleep state. In
both cases, the part can provide wakeup
capability through the soft power management
logic and generate a nPME or nSCI. In an ACPI
system, the devices are powered on and off
through control methods.
Wake Events
Wake events are events that turn power on
(activate nPowerOn output) if enabled. These
events can also be enabled as SMI, SCI and
nPME events as shown in the following table. In
addition, these wake events set the WAK_STS
bit if enabled (see ACPI PM1_STS2 Register
description).
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•
•
MANAGEMENT
UART1 and UART2 interrupts
Mouse and keyboard interrupts
SLP_EN
SMI/SCI/PME
SMI/SCI/PME
SMI/SCI/PME
SMI/SCI/PME
SMI/SCI/PME
SMI/SCI
SMI/SCI/PME
SMI/SCI/PME
SMI/SCI/PME
SMI/SCI
SMI/SCI
SMI/SCI
SCI
SCI
GENERATION
SMI/SCI/PME
2
1
2
1
1
/PME
/PME
/PME
/PME
1
1
1