FDC37B787-NS Standard Microsystems (SMSC), FDC37B787-NS Datasheet - Page 65

• Manufacturer Part Number: FDC37B787-NS
• Manufacturer: Standard Microsystems (SMSC)

Specifications of FDC37B787-NS

• Pin Count: 128
• Lead Free Status / RoHS Status: Compliant

Sense Interrupt Status command is issued after
the Seek command to terminate it and to provide
verification of the head position (PCN). The H bit
(Head Address) in ST0 will always return to a "0".
When exiting POWERDOWN mode, the FDC
clears the PCN value and the status information to
zero.
command, it is highly recommended that the user
service all pending interrupts through the Sense
Interrupt Status command.
Sense Interrupt Status
An interrupt signal on FINT pin is generated by the
FDC for one of the following reasons:
1. Upon entering the Result Phase of:
2. End of Seek, Relative Seek, or Recalibrate
3. FDC requires a data transfer during the
The Sense Interrupt Status command resets the
interrupt signal and, via the IC code and SE bit of
Status Register 0, identifies the cause of the
interrupt.
TABLE 30 - INTERRUPT IDENTIFICATION
a. Read Data command
b. Read A Track command
c. Read ID command
d. Read Deleted Data command
e. Write Data command
f.
g. Write Deleted Data command
h. Verify command
command
execution phase in the non-DMA mode
SE
0
1
1
Format A Track command
Prior to issuing the POWERDOWN
0
1
11
00
01
IC
2M
64
4
Polling
Normal termination of Seek
or Recalibrate command
Abnormal termination of
Seek or Recalibrate
command
INTERRUPT DUE TO
128
1M
8
500K
256
16
HUT
300K
26.7
426
250K
512
32
65
TABLE 31 - DRIVE CONTROL DELAYS (MS)
The Seek, Relative Seek, and Recalibrate
commands have no result phase.
Interrupt Status command must be issued
immediately after these commands to terminate
them and to provide verification of the head
position (PCN). The H (Head Address) bit in ST0
will always return a "0". If a Sense Interrupt Status
is not issued, the drive will continue to be BUSY
and may affect the operation of the next
command.
Sense Drive Status
Sense
information. It has not execution phase and goes
directly to the result phase from the command
phase. Status Register 3 contains the drive status
information.
Specify
The Specify command sets the initial values for
each of the three internal times. The HUT (Head
Unload Time) defines the time from the end of the
execution phase of one of the read/write
commands to the head unload state. The SRT
(Step Rate Time) defines the time interval between
adjacent step pulses. Note that the spacing
between the first and second step pulses may be
shorter than the remaining step pulses. The HLT
(Head Load Time) defines the time between when
the Head Load signal goes high and the read/write
operation starts. The values change with the data
rate speed selection and are documented in
TABLE 31. The values are the same for MFM
and FM.
3.75
2M
4
Drive
1M
7.5
8
Status
500K
16
15
SRT
obtains
300K
26.7
25
250K
32
30
drive
The Sense
status