W83697HG-TR Nuvoton Technology Corporation of America, W83697HG-TR Datasheet - Page 60

• Manufacturer Part Number: W83697HG-TR
• Manufacturer: Nuvoton Technology Corporation of America

Specifications of W83697HG-TR

• Lead Free Status / RoHS Status: Supplier Unconfirmed

FAN2 Duty Cycle Select Register-- Index 03h
Power on default [7:0] = 1111,1111 b
FAN Configuration Register-- Index 04h
Power on default [7:0] = 0000,0000 b
BIT
BIT
7-0
7-2
5-4
3-2
1
0
F2_DC[7:0]
Reserved
FAN2_MODE
FAN1_MODE
FAN2_OB
FAN1_OB
NAME
NAME
Read/Write
Read/Write
Read/Write
Read/Write
Read/Write
Read/Write
READ/WRITE
READ/WRITE
FanPWM2 Duty Cycle. This 8-bit register determines
the number of input clock cycles, out of 256-cycle
period, during which the PWM output is high. During
smart fan 2 control mode, read this register will return
smart fan duty cycle.
00h: PWM output is always logical Low.
FFh: PWM output is always logical High.
XXh: PWM output logical High percentage is
XX/256*100% during one cycle.
Reserved
FAN 2 PWM Control Mode.
00 - Manual PWM Control Mode. (Default)
01 - Thermal Cruise mode.
10 - Fan Speed Cruise Mode.
11 - Reserved.
FAN 1 PWM Control Mode.
00 - Manual PWM Control Mode. (Default)
01 - Thermal Cruise mode.
10 - Fan Speed Cruise Mode.
11 - Reserved.
Enable Fan 2 as Output Buffer. Set to 0, FANPWM2
can drive logical high or logical low. Set to 1,
FANPWM2 is open-drain
Enable Fan 1 as Output Buffer. Set to 1, FANPWM1
can drive logical high or logical low. Set to 1,
FANPWM1 is open-drain
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Publication Release Date: May 30, 2005
DESCRIPTION
DESCRIPTION
W83697HF/ HG
Revision A1