W83697HG-TR Nuvoton Technology Corporation of America, W83697HG-TR Datasheet - Page 89

• Manufacturer Part Number: W83697HG-TR
• Manufacturer: Nuvoton Technology Corporation of America

Specifications of W83697HG-TR

• Lead Free Status / RoHS Status: Supplier Unconfirmed

CRF9 (Default 0x00)
Bit 2: WDTIRQEN.
Bit 1: CIRIRQEN.
Bit 0: MIDIIRQEN.
Bit 7 - 3: Reserved. Return zero when read.
Bit 2: PME_EN: Select the power management events to be either an PME or SMI interrupt
Bit 1: FSLEEP: This bit selects the fast expiry time of individual devices.
Bit 0: SMIPME_OE: This is the SMI and
= 0 the power management events will generate an SMI event.
= 1 the power management events will generate an
for the IRQ events. Note that: this bit is valid only when SMIPME_OE = 1.
= 0 1 S
= 0 neither SMI nor
= 1 an SMI or
= 0
= 1
= 0
= 1
= 0
= 1
= 1 8 mS.
disable the generation of an SMI /
enable the generation of an SMI / SMI interrupt due to watch dog timer's IRQ.
disable the generation of an SMI /
enable the generation of an SMI /
disable the generation of an SMI /
enable the generation of an SMI /
PME
event will be generated.
PME
will be generated. Only the IRQ status bit is set.
PME
- 86 -
output enable bit.
PME
PME
PME
PME
PME
interrupt due to CIR's IRQ.
interrupt due to MIDI's IRQ.
interrupt due to watch dog timer's IRQ.
interrupt due to CIR's IRQ.
interrupt due to MIDI's IRQ.
PME
event.
W83697HF/ HG