FDC37M817-MS Standard Microsystems (SMSC), FDC37M817-MS Datasheet - Page 111
FDC37M817-MS
Manufacturer Part Number
FDC37M817-MS
Description
Manufacturer
Standard Microsystems (SMSC)
Datasheet
1.FDC37M817-MS.pdf
(198 pages)
Specifications of FDC37M817-MS
Pin Count
100
Lead Free Status / RoHS Status
Compliant
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UART Power Management
Direct power management is controlled by CR22.
Refer to CR22 for more information. Auto Power
Management is enabled by CR23-B4 and B5.
When set, these bits allow the following auto
power management operations:
1.
2.
Note:
Exit Auto Powerdown
The transmitter exits powerdown on a write to the
XMIT buffer. The receiver exits auto powerdown
when RXDx changes state.
Parallel Port
Direct power management is controlled by CR22.
Refer to CR22 for more information.
The transmitter enters auto powerdown when
the transmit buffer and shift register are
empty.
The receiver enters powerdown when the
following conditions are all met:
A.
B.
Receive FIFO is empty
The receiver is waiting for a start bit.
While in powerdown the Ring Indicator
interrupt is still valid and transitions when
the RI input changes.
111
Auto Power Management is enabled by CR23-B3.
parallel port blocks to be placed into powerdown
when not being used.
The EPP logic is in powerdown under any of the
following conditions:
1.
2.
The ECP logic is in powerdown under any of the
following conditions:
1.
2
Exit Auto Powerdown
The parallel port logic can change powerdown
modes when the ECP mode is changed through
the ecr register or when the parallel port mode is
changed through the configuration registers.
When set, this bit allows the ECP or EPP logical
EPP is not enabled in the configuration
registers.
EPP is not selected through ecr while in ECP
mode.
ECP is not enabled in the configuration
registers.
SPP, PS/2 Parallel port or EPP mode is
selected through ecr while in ECP mode.
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