FDC37M817-MS Standard Microsystems (SMSC), FDC37M817-MS Datasheet - Page 139

• Manufacturer Part Number: FDC37M817-MS
• Manufacturer: Standard Microsystems (SMSC)

Specifications of FDC37M817-MS

• Pin Count: 100
• Lead Free Status / RoHS Status: Compliant

Chip
Registers[0x00-0x2F]
The chip-level (global) registers lie in the address
range [0x00-0x2F]. The design MUST use all 8
bits of the ADDRESS Port for register selection.
All unimplemented registers and bits
Config Control
Default = 0x00
on VCC POR, VTR
POR and HARD
RESET
Index Address
Default = 0x03
on VCC POR, VTR
POR and HARD
RESET
Logical Device #
Default = 0x00
on VCC POR, VTR
POR and HARD
RESET
REGISTER
Level
(Global)
0x04 - 0x06
ADDRESS
0x03 R/W
0x07 R/W
0x02 W
Control/Configuration
0x00 -
0x01
Chip (Global) Control Registers
Table 52 - Chip Level Registers
Reserved - Writes are ignored, reads return 0.
write, there is no need for software to clear the bits.
Bit 0 = 1: Soft Reset. Refer to the "Configuration
Registers" table for the soft reset value for each
register.
= 1
= 0
Bits [6:2]
Reserved - Writes are ignored, reads return 0.
Bits[1:0]
Sets GP index register address when in Run mode
(not in Configuration Mode).
= 11
= 10
= 01
= 00
device.
configuration registers for each logical device. Note:
The Activate command operates only on the selected
logical device.
The hardware automatically clears this bit after the
Bit[7]
Reserved - Writes are ignored, reads return 0 .
A write to this register selects the current logical
0xEA (Default)
0xE4
0xE2
0xE0
Enable WDT_CTRL and SMI Enable and
SMI Status Register access when not in
configuration mode
Disable WDT_CTRL and SMI Enable and
SMI Status Register access when not in
configuration mode (Default)
This allows access to the control and
139
ignore writes and return zero when read.
The INDEX PORT is used to select a configuration
register in the chip. The DATA PORT is then used
to access the selected register. These registers
are accessible only in the Configuration Mode.
DESCRIPTION
STATE
C
C