PSD834F2-15J STMicroelectronics, PSD834F2-15J Datasheet - Page 48
PSD834F2-15J
Manufacturer Part Number
PSD834F2-15J
Description
Manufacturer
STMicroelectronics
Datasheet
1.PSD834F2-15J.pdf
(95 pages)
Specifications of PSD834F2-15J
Operating Temperature (max)
70C
Operating Temperature (min)
0C
Operating Temperature Classification
Commercial
Package Type
PLCC
Mounting
Surface Mount
Pin Count
52
Lead Free Status / RoHS Status
Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
PSD834F2-15J
Manufacturer:
INTEL
Quantity:
860
PSD834F2V
Table 18. Port Operating Modes
Note: 1. Can be multiplexed with other I/O functions.
Table 19. Port Operating Mode Settings
Note: 1. N/A = Not Applicable
48/95
MCU I/O
PLD I/O
McellAB Outputs
McellBC Outputs
Additional Ext. CS Outputs
PLD Inputs
Address Out
Address In
Data Port
Peripheral I/O
JTAG ISP
MCU I/O
PLD I/O
Data Port (Port A)
Address Out
(Port A,B)
Address In
(Port A,B,C,D)
Peripheral I/O
(Port A)
JTAG ISP (Note
2. The direction of the Port A,B,C, and D pins are controlled by the Direction Register OR’ed with the individual output enable product
3. Any of these three methods enables the JTAG pins on Port C.
term (.oe) from the CPLD AND Array.
Mode
Port Mode
3
)
Declare pins only
Logic equations
N/A
Declare pins only
Logic for equation
Input Macrocells
Logic equations
(PSEL0 & 1)
JTAGSEL
Defined in
PSDabel
Yes
Yes
No
No
Yes
Yes (A7 – 0)
Yes
Yes (D7 – 0)
Yes
No
Port A
N/A
N/A
Specify bus type
N/A
N/A
N/A
JTAG
Configuration
Defined in PSD
Configuration
1
Yes
Yes
Yes
No
Yes
Yes (A7 – 0)
or (A15 – 8)
Yes
No
No
No
Port B
N/A
0
N/A
1
N/A
N/A
N/A
Register
Control
Setting
Yes
No
Yes
No
Yes
No
Yes
No
No
Yes
1 = output,
0 = input
(Note
(Note
N/A
1 (Note
N/A
N/A
N/A
Direction
1
Register
Setting
Port C
2
2
)
)
2
)
N/A
N/A
N/A
N/A
N/A
PIO Bit = 1 N/A
N/A
Register
Setting
VM
Yes
No
No
Yes
Yes
No
Yes
No
No
No
N/A
N/A
N/A
N/A
N/A
JTAG_Enable
JTAG Enable
Port D