HS1-82C55ARH-8 Intersil, HS1-82C55ARH-8 Datasheet
HS1-82C55ARH-8
Specifications of HS1-82C55ARH-8
Related parts for HS1-82C55ARH-8
HS1-82C55ARH-8 Summary of contents
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... Detailed Electrical Specifications for these devices are contained in SMD 5962-95819. A “hot-link” is provided on our homepage for downloading. www.intersil.com/spacedefense/space.asp Ordering Information INTERNAL ORDERING NUMBER MKT. NUMBER 5962R9581901QQC HS1-82C55ARH-8 5962R9581901VQC HS1-82C55ARH-Q 1 1-888-INTERSIL or 321-724-7143 August 2000 Features • Electrically Screened to SMD # 5962-95819 • QML Qualified per MIL-PRF-38535 Requirements • ...
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Pin Descriptions PIN SYMBOL NUMBERS TYPE PA0-7 1-4, 37-40 I/O PB0-7 18-25 I/O PC0-3 14-17 I/O PC4-7 10-13 I/O D0-7 27-34 I/O VDD 26 I GND and A1 ...
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Functional Diagram +5V POWER SUPPLIES GND BIDIRECTIONAL DATA BUS DATA BUS BUFFER RD WR READ/WRITE A1 CONTROL LOGIC A0 RESET CS AC Test Circuit V1 R1 FROM OUTPUT UNDER TEST R2 NOTE: Includes stray and jig capacitance. ...
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Waveforms TRLRH RD TPVRL INPUT TAVRL CS, A1 TRLDV FIGURE 1. MODE 0 (BASIC INPUT) TSLSH STB IBF TRLNL TSLIH INTR TSHNH RD INPUT FROM PERIPHERAL TPVSH FIGURE 3. MODE 1 (STROBED INPUT) DATA FROM CPU ...
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Burn-In Circuits PROGRAMMABLE PERIPHERAL INTERFACE STATIC CONFIGURATION NOTES: 1. VDD = 6.0V 0.5% 2. IDD <500 ...
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Irradiation Circuit CMOS PROGRAMMABLE PERIPHERAL INTERFACE +5. NOTE: 13. VDD = 5.5V Functional Description The HS-82C55ARH is a programmable peripheral ...
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Port C One 8-bit data output latch/buffer and one 8-bit data input buffer (no latch for input). This port can be divided into two 4-bit ports under the mode control. Each 4-bit port contains a 4-bit latch and can be ...
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TABLE Data Bus - 3-State CONTROL WORD FIGURE 11. MODE SET CONTROL WORD FORMAT Mode Selection There are three basic modes ...
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Operating Modes Mode 0 (Basic Input/Output) This functional configuration provides simple input and output operations for each of the three ports. No handshaking it required, data is simply written to or read from a specific port. RD INPUT CS, A1, ...
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Mode 0 Port Definition ...
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Mode 0 Configurations (Continued) CONTROL WORD # CONTROL WORD # ...
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Mode 0 Configurations (Continued) CONTROL WORD # CONTROL WORD # ...
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TSLSH STB IBF TRLNL TSLIH INTR TSHNH RD INPUT FROM PERIPHERAL TPVSH FIGURE 16. MODE 1 (STROBED INPUT) Output Control Signal Definition OBF (Output Buffer Full F/F) The OBF output will go “low” to indicate that the CPU has written ...
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Operating Modes MODE 2 (Strobed Bidirectional Bus I/O) The functional configuration provides a means for communicating with a peripheral device or structure on a single 8-bit bus for both transmitting and receiving data (bidirectional bus I/O). “Handshaking” signals are provided ...
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MODE 0 IN PA0 In AP1 In PA2 In PA3 In PA4 In PA5 In PA6 In PA7 In PB0 In PB1 In PB2 In PB3 In PB4 In PB5 In PB6 In PB7 In PC0 In PC1 In PC2 ...
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Current Drive Capability Any output on Port can sink or source 2.5mA. This feature allows the 82C55A to directly drive Darlington type drivers and high-voltage displays that require such sink or source current. Reading Port C ...
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... Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use ...