USB97CFDC2-MV-01P Standard Microsystems (SMSC), USB97CFDC2-MV-01P Datasheet - Page 23
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USB97CFDC2-MV-01P
Manufacturer Part Number
USB97CFDC2-MV-01P
Description
Manufacturer
Standard Microsystems (SMSC)
Datasheet
1.USB97CFDC2-MV-01P.pdf
(24 pages)
Specifications of USB97CFDC2-MV-01P
Lead Free Status / RoHS Status
Supplier Unconfirmed
Note 1: All voltages are measured from the local ground potential, unless otherwise specified.
Note 2: All timing use a capacitive load (CL) to ground of 50pF, unless otherwise specified.
Note 3: Full speed timings have a 1.5KΩ pull-up to 2.8 V on the D+ data line.
Note 4: Measured from 10% to 90% of the data signals.
Note 5: The rising and falling edges should be smoothly transiting (monotonic).
Note 6: Timing differences between the differential data signals.
Note 7: Measured at crossover point of differential data signals.
Note 8: These are relative to the 14.318 MHz crystal.
SMSC DS – USB97CFDC2-01
Cable Impedance and Timing
Cable Impedance (Full
Speed)
Cable Delay (One Way)
PARAMETER
TCBL
SYM
ZO
DATASHEET
(45 Ω +/- 15%)
(NOTE 1, 2, 3)
CONDITIONS
Page 23
38.75
MIN
TYP
51.75
MAX
30
UNIT
ns
Ω
Rev. 02-27-07