MC33882DHR2 Freescale, MC33882DHR2 Datasheet - Page 18
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MC33882DHR2
Manufacturer Part Number
MC33882DHR2
Description
Manufacturer
Freescale
Datasheet
1.MC33882DHR2.pdf
(27 pages)
Specifications of MC33882DHR2
Switch Type
Low Side
Power Switch Family
MC33882
Input Voltage
-0.3 to 7.3V
Power Switch On Resistance
400mOhm
Output Current
3A
Number Of Outputs
8
Mounting
Surface Mount
Supply Current
7.5mA
Package Type
HSOP
Operating Temperature (min)
-40C
Operating Temperature Classification
Automotive
Pin Count
32
Lead Free Status / RoHS Status
Compliant
conditions, the SO pin (not daisy chained) returns all 0s,
representing no faults. If a fault is present, a 1 is returned for
the appropriate bit. In 16-bit SPI mode, sending a double
command byte will provide a command verification byte
following the fault status byte returned from the SO pin (non-
daisy chained). With the
tri-states. If nothing is connected to the SO pin except an
Normal Operation
OUT0 to OUT5 may be driven serially or by their parallel input
pins. OUT6 and OUT7 can only be controlled by their parallel
input pins. Device operation is considered normal only if the
following conditions apply:
• V
• Junction temperatures less than 150°C.
• For each output, drain voltage exceeds the Open Load
• The
Serial / Parallel Input Control
sent via the SPI port from the control IC or by the parallel
control pins for each channel. For channels 0 to 5 with serial
and parallel control the output state is determined by the OR
of the serial bit and the parallel input pin state. Serial
communication is initiated by a low state on the
timed by the SCLK signal. After
initiates eight or 16 clock pulses with the control bits being
available on the SI pin at the rising edge of SCLK.
order. Any fault or
[1]s. The last six bits are the command signals to the six
outputs. Upon completion of the serial communication the
pin will switch high. This terminates the communication with
the slave device and loads the control bits just received to the
output channels. Upon device power
cleared.
number of SPI devices available to be driven by the SO pin is
limited to eight devices.
Serial Status Output
the fault status of each output channel as well as a check for
MODE
18
33882
FUNCTIONAL DESCRIPTION
FUNCTIONAL PIN DESCRIPTION
OUT0 to OUT7 are independent during normal operation.
OFF Detection Voltage, specified in the specification table,
while the output is OFF. For open load detection, an open
condition existing for less than the Open Load Detection
time, specified in the specification table, is not considered
a fault nor is it reported to the fault status register.
serial channel / parallel input pins in control of the eight
outputs.
Input control is accomplished by the serial control byte
In the application for non
Serial output information sent on the SPI port is a check on
The bits are transferred in descending bit
PWR
initiation. Serial command verification is also possible.
MODE
of 5.5 V to 24 V and V
pin is held at the logic low level, keeping the
MODE
MODE
indications on bits returned are logic
-
daisy chain configurations, the
DD
pin high, the serial output pin
CS
voltage of 4.75 V to 5.25 V.
switches low, the IC
-
up, the serial register is
-
significant
PERFORMANCE FEATURES
CS
pin and
CS
external 10 kΩ pull-up resistor, data is read as all 1s by the
control IC.
V
system. A decoupling capacitor is required from V
ground.
SO Pin Operation
The status bits returned to the IC are the fault register bits
with logic [1]s indicating a fault on the designated output or
MODE
on the SO pin). A command verification is possible if the SPI
mode is switched to 16 bits. The first byte (8 bits) returned
would be the fault status, while the second byte returned
would be the first byte sent feeding through the 33882 IC.
33882 IC. The
selected for serial communication with the IC. Once
switches low, the fault status register cannot receive new
fault information and serial communication begins. As the
control bits are clocked from the IC MSB first, they are
received on rising SCLK edges at the SI pin.
SCLK edges and are sampled on rising SCLK edges at the
input pin of the IC SPI device. When the command bit
transmissions for serial communication are complete, the
pin is switched high. This terminates communication with the
device. The SO pin tri-states, the fault status register is
opened to accept new fault information, and the transmitted
command data is loaded to the outputs. At the same time, the
IC can read the status byte it received.
Daisy Chain Operation (Only Possible with SO Pin)
save
as defined in the
chaining two 8-bit devices, a 16-bit SPI command is sent, the
first command byte for the second daisy chain device and the
second command byte for the first daisy chain device. A
command verification is possible if the SPI mode is switched
to 32 bits. The first word sent is command verification data
fed through the two 33882 ICs. Data returned in the 32 bits is
the two fault status bytes, followed by the first word sent. Bits
sent out are sampled on rising SCLK edges at the input pin
of the next IC in the daisy chain.
any device receiving its SPI data from a previous 33882 IC
SO pin in a daisy chain will not receive data if the
is low. This prohibits setting SPI-controlled channels ON with
a SPI command while the
channels remain OFF when the
to high at vehicle power-up.
DD
This pin is connected to the 5.0 V power supply of the
The SO pin provides SPI status, allowing daisy chaining.
The fault status bits transition on the SO pin on falling
Daisy chain configurations can be used with the SO pin to
Note Because SO pins of the 33882 ICs are tri-stated,
The second command byte sent would be latched into the
Pin
CS
if all bits return logic [1] (with a 10 kΩ pull-up resistor
outputs on the IC. Clocking and pin operations are
CS
SO Pin Operation
pin switching low indicates the device is
Analog Integrated Circuit Device Data
MODE
MODE
pin is low. Therefore, all
Freescale Semiconductor
paragraph. For daisy
pin changes from low
DD
MODE
CS
to
pin
CS