LH75410N0M100C0 Sharp Electronics, LH75410N0M100C0 Datasheet - Page 72

• Manufacturer Part Number: LH75410N0M100C0
• Manufacturer: Sharp Electronics

Specifications of LH75410N0M100C0

• Lead Free Status / RoHS Status: Not Compliant

LH75400/01/10/11
Color LCD Controller Timing Waveforms
grams for the CLCDC and the Advanced LCD Interface.
STN HORIZONTAL TIMING
for STN panels. In this figure, the CLCDC Clock (an
input to the CLCDC) is scaled within the CLCDC and
used to produce the LCDDCLK output. Programmable
registers in the CLCDC set the timings (in terms of
LCDDCLK pulses) to produce the other signals that
control an STN display.
For example, Figure 20 shows that the duration of
the LCDLP signal is controlled by Timing0:HSW
(the HSW bit field in the Timing0 Register). Figure
20 also shows that the polarity of the LCDLP sig-
nal is set by Timing2:IHS.
STN VERTICAL TIMING
for STN panels.
72
This section describes typical output waveform dia-
Figure 20 shows typical horizontal timing waveforms
Figure 21 shows typical vertical timing waveforms
Version 1.2
TFT HORIZONTAL TIMING
for TFT panels.
TFT VERTICAL TIMING
for TFT panels.
AD-TFT/HR-TFT HORIZONTAL TIMING WAVE-
FORMS
for AD-TFT and HR-TFT panels. The ALI adjusts the
normal TFT timing to accommodate these panels.
AD-TFT/HR-TFT VERTICAL TIMING WAVEFORMS
for AD-TFT and HR-TFT panels. The power sequenc-
ing and register information is the same as for TFT ver-
tical timing.
Figure 22 shows typical horizontal timing waveforms
Figure 23 shows typical vertical timing waveforms
Figure 24 shows typical horizontal timing waveforms
Figure 25 shows typical vertical timing waveforms
System-on-Chip
Data Sheet