MPC860PZQ80D4 Freescale, MPC860PZQ80D4 Datasheet - Page 17

• Manufacturer Part Number: MPC860PZQ80D4
• Manufacturer: Freescale

Specifications of MPC860PZQ80D4

• Family Name: MPC8xx
• Device Core: PowerQUICC
• Device Core Size: 32b
• Frequency (max): 80MHz
• Instruction Set Architecture: RISC
• Supply Voltage 1 (typ): 2.5/3.3V
• Operating Supply Voltage (max): 3.465/3.6V
• Operating Supply Voltage (min): 2/3.135V
• Operating Temp Range: 0C to 95C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Pin Count: 357
• Package Type: BGA
• Lead Free Status / RoHS Status: Not Compliant

Freescale Semiconductor
B24a
B27a
B28a
B28b
B28d
B29a
B29b
Num
B28c
B29c
B23
B24
B25
B26
B27
B28
B29
CLKOUT rising edge to CS negated GPCM
read access, GPCM write access ACS = 00,
TRLX = 0, and CSNT = 0
A(0:31) and BADDR(28:30) to CS asserted
GPCM ACS = 10, TRLX = 0
A(0:31) and BADDR(28:30) to CS asserted
GPCM ACS = 11, TRLX = 0
CLKOUT rising edge to OE, WE(0:3)
asserted
CLKOUT rising edge to OE negated
A(0:31) and BADDR(28:30) to CS asserted
GPCM ACS = 10, TRLX = 1
A(0:31) and BADDR(28:30) to CS asserted
GPCM ACS = 11, TRLX = 1
CLKOUT rising edge to WE(0:3) negated
GPCM write access CSNT = 0
CLKOUT falling edge to WE(0:3) negated
GPCM write access TRLX = 0, 1, CSNT = 1,
EBDF = 0
CLKOUT falling edge to CS negated GPCM
write access TRLX = 0, 1, CSNT = 1,
ACS = 10, or ACS = 11, EBDF = 0
CLKOUT falling edge to WE(0:3) negated
GPCM write access TRLX = 0, 1, CSNT = 1
write access TRLX = 0, CSNT = 1,
EBDF = 1
CLKOUT falling edge to CS negated GPCM
write access TRLX = 0, 1, CSNT = 1,
ACS = 10, or ACS = 11, EBDF = 1
WE(0:3) negated to D(0:31), DP(0:3) High-Z
GPCM write access CSNT = 0, EBDF = 0
WE(0:3) negated to D(0:31), DP(0:3) High-Z
GPCM write access, TRLX = 0, CSNT = 1,
EBDF = 0
CS negated to D(0:31), DP(0:3), High-Z
GPCM write access, ACS = 00, TRLX = 0, 1,
and CSNT = 0
CS negated to D(0:31), DP(0:3) High-Z
GPCM write access, TRLX = 0, CSNT = 1,
ACS = 10, or ACS = 11, EBDF = 0
Characteristic
MPC860 PowerQUICC™ Family Hardware Specifications, Rev. 8
Table 7. Bus Operation Timings (continued)
13.15
35.88
43.45
10.86
13.15
13.15
2.00
5.58
2.00
7.58
5.58
5.58
Min
—
—
—
—
33 MHz
14.33
14.33
17.99
17.99
Max
8.00
9.00
9.00
9.00
—
—
—
—
—
—
—
—
10.50
29.25
35.50
2.00
4.25
2.00
6.25
8.88
4.25
10.5
4.25
10.5
Min
—
—
—
—
40 MHz
13.00
13.00
16.00
16.00
Max
8.00
9.00
9.00
9.00
—
—
—
—
—
—
—
—
23.00
28.00
2.00
3.00
8.00
2.00
5.00
7.00
3.00
8.00
3.00
8.00
Min
—
—
—
—
50 MHz
11.75
11.75
14.13
14.13
Max
8.00
9.00
9.00
9.00
—
—
—
—
—
—
—
—
16.94
20.73
2.00
1.79
5.58
2.00
3.80
5.18
1.79
5.58
1.79
5.58
Min
—
—
—
—
66 MHz
Bus Signal Timing
10.54
10.54
12.31
12.31
Max
8.00
9.00
9.00
9.00
—
—
—
—
—
—
—
—
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
17