MC9328MXLVP15R2 Freescale, MC9328MXLVP15R2 Datasheet - Page 30

• Manufacturer Part Number: MC9328MXLVP15R2
• Manufacturer: Freescale

Specifications of MC9328MXLVP15R2

• Operating Temperature (min): 0C
• Operating Temperature (max): 70C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Lead Free Status / RoHS Status: Compliant

Functional Description and Application Information
4.4.3
The External Interface Module (EIM) is the interface to devices external to the
generation of chip-selects for external peripherals and memory. The timing diagram for the EIM is shown
in
30
Note:
1. T is the system clock period. (For 96 MHz system clock, T=10.42 ns)
2. CS5 assertion can be controlled by CSA bits. EB assertion also can be programmable by WEA bits in CS5L register.
3. Address becomes valid and RW asserts at the start of write access cycle.
4.The external wait input requirement is eliminated when CS5 is programmed to use internal wait state.
Figure
Number
10
11
12
13
1
2
3
4
5
6
7
8
9
Table 16. WAIT Write Cycle DMA Enabled: WSC = 111111, DTACK_SEL=1, HCLK=96MHz
5, and
EIM External Bus Timing
Address inactived after CS negated
EB assertion time
CS5 pulse width
RW negated before CS5 is negated
Wait asserted after CS5 asserted
Wait asserted to RW negated
Data hold timing after RW negated
Data ready after CS5 is asserted
CS deactive to next CS active
EB negate after CS negate
Wait becomes low after CS5 asserted
Wait pulse width
CS5 assertion time
Table 12
Characteristic
defines the parameters of signals.
MC9328MXL Technical Data, Rev. 8
See note 2
See note 2
Minimum
2.5T-3.63
2T+0.03
T+2.66
0.5T
3T
1T
–
–
–
T
0
3.0 ± 0.3 V
i.MXL
Maximum
2.5T-1.16
0.5T+0.5
2T+7.96
1020T
1019T
1020T
Freescale Semiconductor
0.09
T
–
–
–
–
–
, including
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns