MCIMX286DVM4B Freescale, MCIMX286DVM4B Datasheet - Page 33
MCIMX286DVM4B
Manufacturer Part Number
MCIMX286DVM4B
Description
Manufacturer
Freescale
Datasheet
1.MCIMX286DVM4B.pdf
(70 pages)
Specifications of MCIMX286DVM4B
Lead Free Status / RoHS Status
Compliant
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3.4.3.4
Figure 8
3.4.4
The ENET is designed to support both 10- and 100-Mbps Ethernet networks compliant with IEEE 802.3.
An external transceiver interface and transceiver function are required to complete the interface to the
media. The ENET supports 10/100-Mbps MII (18 pins altogether), 10/100-Mbps RMII (10 pins, including
serial management interface), for connection to an external Ethernet transceiver. All signals are compatible
with transceivers operating at a voltage of 3.3 V.
The following subsections describe the timing for MII and RMII modes.
Freescale Semiconductor
DDR20
DDR21
DDR22
ID
and
EMI_CLKN
EMI_CLK
EMI_DQSN
EMI_DQS
EMI_DQ
Positive DQS latching edge to associated CK edge
DQS to DQ input skew
DQS to DQ input hold time
Ethernet MAC Controller (ENET) Timing
Table 37
LPDDR1 Input AC Timing
i.MX28 Applications Processor Data Sheet for Consumer Products, Rev. 0
show input AC timing for LPDDR1.
Description
Figure 8. LPDDR1 Input AC Timing
DDR21
Table 37. DDR2 Input AC Timing
d0
DDR20
DDR22
d1
tDQSCK
tDQSQ
tQH
Symbol
d2
2
0.25 tCK
–0.85
0.25 tCK
+0.75
d3
Min
0.25 tCK
–0.5
0.25 tCK
+ 1
6
Max
ns
ns
ns
Unit
33
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