MCIMX353CJQ5C Freescale, MCIMX353CJQ5C Datasheet - Page 144

• Manufacturer Part Number: MCIMX353CJQ5C
• Manufacturer: Freescale

Specifications of MCIMX353CJQ5C

• Operating Temperature (min): -40C
• Operating Temperature (max): 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Lead Free Status / RoHS Status: Compliant

6
All related product documentation for the i.MX35 processor is located at http://www.freescale.com/imx.
7
Table 95
between revision 1 and revision 4 or between revision 6 and revision 7.
144
Revision
W
P
R
U
V
Y
Number
T
_MDI
_TX_
DATA
ATA_
ATA_
9
8
7
_MD
GND
FEC
FEC
FEC
RTS
DA1
EN
14
O
C
1
1
1
Product Documentation
Revision History
_RX_
_RX_
INTR
DATA
DATA
ATA0
ATA_
ATA_
ATA_
FEC
_RD
FEC
CLK
FEC
RXD
shows the revision history of this document. Note: There were no revisions of this document
DV
13
11
12/18/2009 • Updated
Q
2
1
2
08/2010
04/2010
Date
DATA
DATA
DATA
DATA
ATA_
DMA
ATA_
ATA_
ATA_
ATA_
_CO
FEC
CTS
RQ
12
10
3
L
1
9
7
3
Table 94. Silicon Revision 2.1 Ball Map—17 x 17, 0.8 mm Pitch (continued)
i.MX35 Applications Processors for Industrial and Consumer Products, Rev. 9
_TX_
ATA_
ATA_
DATA
ATA_
DATA
ATA_
DATA
ATA_
DATA
ATA_
DATA
FEC
CLK
DA0
15
4
8
6
5
4
4
• Updated
• Updated
• Updated
_TDA
DATA
DATA
DATA
DATA
ATA_
ATA_
ATA_
ATA_
ATA_
ATA_
FEC
DA2
BUF
F_E
TA0
N
5
3
2
1
0
5
C_AT
ET_B
IORD
DIOR
ATA_
ATA_
ATA_
ATA_
ATA_
NVC
RES
DMA
TXD
DIO
CK
W
A
Y
6
1
6
Table 30, “NFC Timing Parameters.”
Table 31, “WEIM Bus Timing Parameters
Table
Table
Table 95. i.MX35 Data Sheet Revision History
C_AT
ATA_
ATA_
_PW
ODE
NVC
VDD
CS1
USB
OTG
_OC
CS0
USB
OTG
TES
T_M
R
7
A
3
7
14,
1,
“Ordering Information.”
“I/O Pin DC Electrical Characteristics.”
C_AT
1_SP
1_SS
EXT_
1_SC
1_SS
CSPI
I_RD
CSPI
ARM
CSPI
CSPI
NVC
VDD
CLK
LK
A
Y
8
3
1
0
8
CSPI
CSPI
POW
GND
BOO
ODE
1_MI
NVC
C_C
VST
T_M
1_M
ER_
FAIL
OSI
RM
SO
BY
9
1
9
CLK_
CLK_
GND
MOD
BOO
ODE
MOD
NVC
C_M
RES
ET_I
N_B
CLK
T_M
10
LB
E1
E0
10
O
0
Substantive Change(s)
GPIO
GPIO
GPIO
GPIO
MVD
NVC
POR
C_C
1_0
2_0
3_0
1_1
_B
11
11
SI
D
SD2_
2_VS
DATA
_SIG
WDO
COM
PHY
VDD
PAR
CAP
TUR
MLB
G_R
ST
12
12
S
4
E
3
E
2_VD
SD2_
DATA
SD2_
SD2_
DATA
_CLK
_DAT
CMD
PHY
MLB
MLB
FUS
E_V
DD
13
13
.”
D
1
0
SD1_
SD2_
SD2_
DATA
DATA
CSI_
CSI_
CSI_
NVC
C_S
VSY
HSY
CLK
DIO
D14
NC
NC
14
14
0
2
CSI_
CSI_
CSI_
CSI_
CSI_
PIXC
TDO
MCL
D11
D13
TDI
D8
LK
15
15
K
SD1_
C_JT
DATA
NVC
TMS
CSI_
CSI_
CSI_
TRS
D10
D12
D15
AG
TB
16
16
1
1_UP
SD1_
LLVD
SJC_
DATA
GND
MOD
CSI_
USB
PHY
TCK
USB
PHY
2_D
D9
17
17
Freescale Semiconductor
D
M
3
1_VB
1_VS
24M_
SD1_
SD1_
DATA
2_DP
BIAS
USB
PHY
USB
PHY
OSC
RTC
USB
PHY
SA_
VSS
CLK
US
18
18
K
2
1_DP
24M_
SD1_
DIO_
XTAL
CMD
OSC
OSC
USB
PHY
USB
PHY
REF
VDD
VSS
DE_
1_R
_AU
_AU
DIO
19
19
B
1_VS
1_VD
EXTA
L24M
XTAL
EXTA
L_AU
BIAS
OSC
DIO_
GND
PHY
USB
PHY
VDD
DA_
24M
_AU
DIO
SA
20
20
W
P
R
U
V
Y
T