MCIMX353DVM5B Freescale, MCIMX353DVM5B Datasheet - Page 57
MCIMX353DVM5B
Manufacturer Part Number
MCIMX353DVM5B
Description
Manufacturer
Freescale
Datasheet
1.MCIMX353DVM5B.pdf
(148 pages)
Specifications of MCIMX353DVM5B
Operating Temperature (min)
-20C
Operating Temperature (max)
70C
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Lead Free Status / RoHS Status
Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
MCIMX353DVM5B
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
Part Number:
MCIMX353DVM5B
Manufacturer:
FREESCALE
Quantity:
20 000
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Freescale Semiconductor
No.
87
80
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91
i ck = internal clock
x ck = external clock
i ck a = internal clock, asynchronous mode
(asynchronous implies that SCKT and SCKR are two different clocks)
i ck s = internal clock, synchronous mode
(synchronous implies that SCKT and SCKR are the same clock)
bl = bit length
wl = word length
wr = word length relative
SCKT(SCKT pin) = transmit clock
SCKR(SCKR pin) = receive clock
FST(FST pin) = transmit frame sync
FSR(FSR pin) = receive frame sync
HCKT(HCKT pin) = transmit high frequency clock
HCKR(HCKR pin) = receive high frequency clock
For the internal clock, the external clock cycle is defined by Icyc and the ESAI control register.
The word-relative frame sync signal waveform relative to the clock operates in the same manner as the bit-length frame sync
signal waveform, but it spreads from one serial clock before the first bit clock (like the bit length frame sync signal), until the
second-to-last bit clock of the first word in the frame.
Periodically sampled and not 100% tested.
SCKT rising edge to FST out (wr) high
SCKT rising edge to FST out (wr) low
SCKT rising edge to FST out (wl) high
SCKT rising edge to FST out (wl) low
SCKT rising edge to data out enable from high
impedance
SCKT rising edge to data out valid
SCKT rising edge to data out high impedance
FST input (bl, wr) setup time before SCKT falling edge
FST input (wl) setup time before SCKT falling edge
FST input hold time after SCKT falling edge
i.MX35 Applications Processors for Industrial and Consumer Products, Rev. 9
Characteristics
Table 43. Enhanced Serial Audio Interface Timing (continued)
1,2
5
5
67
5
Symbol
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
Expression
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
2
Min.
18.0
18.0
2.0
2.0
4.0
5.0
—
—
—
—
—
—
—
—
—
—
—
—
—
—
Max. Condition
20.0
10.0
22.0
12.0
19.0
20.0
10.0
22.0
17.0
18.0
13.0
21.0
16.0
9.0
—
—
—
—
—
—
x ck
x ck
x ck
x ck
x ck
x ck
x ck
x ck
x ck
x ck
i ck
i ck
i ck
i ck
i ck
i ck
i ck
i ck
i ck
i ck
3
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
57
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