KMPC853TZT66A Freescale, KMPC853TZT66A Datasheet

KMPC853TZT66A

Manufacturer Part Number

KMPC853TZT66A

Description

Manufacturer

Freescale

Datasheet

1.KMPC853TZT66A.pdf (1 pages)

Specifications of KMPC853TZT66A

Mounting

Surface Mount

Lead Free Status / RoHS Status

Not Compliant

Available stocks

Company

Part Number

Manufacturer

Quantity

Price

Company:

BOSTOCK HK LIMITED

Part Number:

KMPC853TZT66A

Manufacturer:

Freescale Semiconductor

Quantity:

10 000

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MPC853T Product Summary Page

http://www.freescale.com/webapp/sps/site/prod_summary.jsp?code=MPC853T

www.freescale.com

Freescale

MPC853T: PowerQUICC Integrated Communications Processor

The MPC853T is an "ethernet-only" member of the MPC866 Family. Like the MPC866, the MPC853T is a 0.18 micron

version of the PowerQUICC Family and can operate up to a maximum of 100 MHz on the MPC8xx Core with a maximum

of 66 MHz external bus. The MPC853T has a 1.8 V core and has a 3.3 V I/O operation with 5 V TTL compatibilty. The

MPC853T Integrated Communications Controller is a versatile one-chip integrated microprocessor and peripheral

combination that can be used in a variety of controller applications. The MPC853T is ideal for voice-enabled systems

(TDM-based) and ethernet to ethernet applications such as line cards.

The MPC853T is a Power Architecture-based derivative of Freescale Semiconductor's Quad Integrated Communications

Controller (PowerQUICC).. The CPU on the MPC853T is the MPC8xx core, a 32-bit microprocessor built on Power

Architecture technology, incorporating memory management units (MMUs) and instruction and data caches.

View Block Diagram

Features

Maximum frequency operation of the MPC8xx core is 100 MHz

MPC866 Family Versions and Masks

Note 1: Where nn = 50, 66, 100, or 133

Rev

0.3

A.0

Maximum frequency operation of the external bus is 66 MHz in 1:1 mode

Single-issue, 32-bit core (compatible with Power Architecture technology) with 32, 32-bit general-purpose registers

(GPRs)

Up to 32-bit data bus (dynamic bus sizing for 8, 16, and 32 bits)

32 address lines

Memory controller (eight banks)

General-purpose timers

System integration unit (SIU)

Interrupts

Communications processor module (CPM)

Two baud rate generators

Two SCCs (serial communication controllers) (10BaseT Ethernet, HDLC, Transparent)

One SMC (serial management channel)

One SPI (serial peripheral interface)

Fast Ethernet controller (FEC)

Time-slot assigner (TSA)

PCMCIA interface

Debug interface

1.8 V Core and 3.3 V I/O operation with 5-V TTL compatibility

256-pin, 23*23 1.27 ball pitch (BGA) package

Data Sheet

Overview

3L90H

0L96R

Mask

PowerQUICC Communications Processors

Process

HiP6W

Site Map

Application Notes

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9/22/2007

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