MC9328MXLCVH15 Freescale, MC9328MXLCVH15 Datasheet - Page 72
MC9328MXLCVH15
Manufacturer Part Number
MC9328MXLCVH15
Description
Manufacturer
Freescale
Datasheet
1.MC9328MXLCVH15.pdf
(84 pages)
Specifications of MC9328MXLCVH15
Operating Temperature (min)
-40C
Operating Temperature (max)
85C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Lead Free Status / RoHS Status
Not Compliant
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Specifications
72
1
2
3
4
5
6
7
8
1.
2.
3.
28
29
30
31
32
33
34
STCK/SRCK clock period
STCK high to STFS (bl) high
SRCK high to SRFS (bl) high
STCK high to STFS (bl) low
SRCK high to SRFS (bl) low
STCK high to STFS (wl) high
SRCK high to SRFS (wl) high
STCK high to STFS (wl) low
All the timings for the SSI are given for a non-inverted serial clock polarity (TSCKP/RSCKP = 0) and a
non-inverted frame sync (TFSI/RFSI = 0). If the polarity of the clock and/or the frame sync have been
inverted, all the timing remains valid by inverting the clock signal STCK/SRCK and/or the frame sync
STFS/SRFS shown in the tables and in the figures.
There are 2 sets of I/O signals for the SSI module. They are from Port C primary function (pad 257 to pad
261) and Port B alternate function (pad 283 to pad 288). When SSI signals are configured as outputs, they
can be viewed both at Port C primary function and Port B alternate function. When SSI signals are
configured as input, the SSI module selects the input based on status of the FMCR register bits in the
Clock controller module (CRM). By default, the input are selected from Port C primary function.
bl = bit length; wl = word length.
Table 29. SSI (Port C Primary Function) Timing Parameter Table (Continued)
STCK high to STXD high impedance
SRXD setup time before SRCK low
SRXD hole time after SRCK low
SRXD setup before STCK falling
SRXD hold after STCK falling
SRXD setup before STCK falling
SRXD hold after STCK falling
Table 30. SSI (Port B Alternate Function) Timing Parameter Table
Internal Clock Operation
1
MC9328MXL Advance Information, Rev. 5.1
3
3
3
3
3
3
3
3.08
1.25
1.71
3.08
-0.1
-0.1
1.7
95
1
18.47
1.14
15.4
1.14
(Port B Alternate Function
0
0
0
±
±
5.24
2.28
4.79
5.24
4.8
1.0
1.0
–
28.5
–
–
–
–
–
–
Minimum
Minimum
83.3
-0.1
-0.1
1.5
2.7
1.1
1.5
2.7
16.2
13.5
2
1.0
1.0
)
0
0
0
3.0V ± 0.30V
3.0V ± 0.30V
Maximum
Freescale Semiconductor
Maximum
4.2
1.0
4.6
2.0
4.2
1.0
4.6
25.0
–
–
–
–
–
–
–
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
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