SAA7144HL/V1,557 Trident Microsystems, Inc., SAA7144HL/V1,557 Datasheet
SAA7144HL/V1,557
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SAA7144HL/V1,557 Summary of contents
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SAA7144HL Quadruple video input processor Rev. 01 — 21 April 2005 1. General description The SAA7144HL is a combination of four stand alone multistandard video decoders. The SAA7144HL is a pure 3 tolerant inputs and I/Os) CMOS ...
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Philips Semiconductors 2. Features 2.1 General Four stand alone video decoder instances ( with two selectable CVBS video inputs each and digital video outputs Programming register mapping identical to SAA7113H Small package (LQFP128) Requires only one crystal ...
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Philips Semiconductors 4. Quick reference data Table 1: Quick reference data Symbol Parameter V digital supply voltage DDD V analog supply voltage DDA T ambient temperature amb P analog and digital power dissipation A+D 5. Ordering information Table 2: Ordering ...
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Philips Semiconductors 6. Block diagram PROCESSING AI11_A AI1D_A CONVERSION AI12_A AGND_A PROCESSING SCL_AB SDA_AB PROCESSING AGND_B AI12_B AI1D_B AI11_B CONVERSION PROCESSING PROCESSING AI11_C AI1D_C CONVERSION AI12_C AGND_C PROCESSING SCL_CD SDA_CD PROCESSING AGND_D AI12_D AI1D_D AI11_D CONVERSION PROCESSING Fig 1. Block ...
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Philips Semiconductors 7. Pinning information 7.1 Pinning Fig 2. Pin configuration for LQFP128. 7.2 Pin description Table 3: Symbol V SSA1(DECA) V DDA1(DECA) AI11_A AI12_A AI1D_A AGND_A DNC1 V DDA0(DECA) V SSA0(DECA) V SSA1(DECB) V DDA1(DECB) AI11_B AI12_B AI1D_B AGND_B ...
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Philips Semiconductors Table 3: Symbol V SSA0(DECB) V SSA1(DECC) V DDA1(DECC) DNC4 AI11_C AI12_C AI1D_C AGND_C DNC5 V DDA0(DECC) V SSA0(DECC) V SSA1(DECD) V DDA1(DECD) AI11_D AI12_D AI1D_D AGND_D DNC6 V DDA0(DECD) V SSA0(DECD) DNC7 DNC8 DNC9 DNC10 DNC11 DNC12 ...
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Philips Semiconductors Table 3: Symbol V SSDI V DDDI VPO2_D VPO1_D VPO0_D LLC_C VPO7_C VPO6_C DNC14 VPO5_C VPO4_C V DDDE V SSDE VPO3_C VPO2_C V SSDI V DDDI DNC15 DNC16 VPO1_C DNC17 VPO0_C V SSDA XTALO DNC18 DNC19 XTALI V ...
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Philips Semiconductors Table 3: Symbol VPO3_B VPO2_B VPO1_B DNC24 VPO0_B LLC_A VPO7_A VPO6_A VPO5_A V SSDI V DDDI VPO4_A V DDDE V SSDE VPO3_A VPO2_A VPO1_A VPO0_A TDI TDO TMS TCK TRST_N DNC25 DNC26 DNC27 DNC28 DNC29 DNC30 DNC31 In ...
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Philips Semiconductors 8.1 Analog input processing The analog input processing part consists of a source switch to select one out of two video inputs, clamp circuit, analog amplifier, anti-alias filter and video 9-bit CMOS ADC; see Figure 8.2 Analog control ...
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Philips Semiconductors TV line analog line blanking 255 GAIN CLAMP 60 1 HCL HSY Fig 4. Analog line with clamp (HCL) and gain range (HSY). 5 AI1D_A SOURCE 4 AI12_A SWITCH 3 AI11_A 9 V SSA0(DECA SSA1(DECA) 8 ...
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Philips Semiconductors STOP Fig 7. Gain flow chart. 9397 750 14454 Product data sheet ANALOG INPUT AMPLIFIER ANTI-ALIAS FILTER ADC 1 NO ACTION VBLK 0 254 248 1/F 1/L 1/LLC2 GAIN ACCUMULATOR ...
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Philips Semiconductors Fig 8. Clamp and gain flow. 8.3 Chrominance processing The 9-bit chrominance signal is fed to the multiplication inputs of a quadrature demodulator, where two subcarrier signals from the local oscillator DTO are applied (0 and 90 phase ...
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Philips Semiconductors The SECAM processing contains the following blocks: • Baseband ‘bell’ filters to reconstruct the amplitude and phase equalized 0 and 90 FM signals • Phase demodulator and differentiator (FM-demodulation) • De-emphasis filter to compensate the pre-emphasized input signal, ...
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Philips Semiconductors (dB) (1) CHBW[1:0] = 00. (2) CHBW[1:0] = 01. (3) CHBW[1:0] = 10. (4) CHBW[1:0] = 11. Fig 9. Chrominance filter. 9397 750 14454 Product data sheet (1) 6 (2) ( ...
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LUM CHR 121 TRST_N QUADRATURE 120 TCK TEST DEMODULATOR 117 CONTROL TDI BLOCK 119 TMS 118 TDO SUBCARRIER RESET GENERATION HUEC POWER- DDA0(DECA) CONTROL CSTD[2:0] CLOCK LUM This is valid for decoder and D. Here ...
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Philips Semiconductors 8.4 Luminance processing The 9-bit luminance signal, a digital CVBS format, is fed through a switchable prefilter. High frequency components are emphasized to compensate for loss. The following chrominance trap filter (f selected color standard) eliminates most of ...
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Philips Semiconductors V (dB) (1) 40h (2) 41h (3) 42h (4) 43h Fig 12. Luminance control SA 09h, 4.43 MHz trap, prefilter on, different aperture factors. V (dB) (1) 03h (2) 13h (3) 23h (4) 33h Fig 13. Luminance control ...
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Philips Semiconductors V (dB) (1) 43h (2) 53h (3) 63h (4) 73h Fig 14. Luminance control SA 09h, 3.58 MHz trap, prefilter on, different aperture V (dB) (1) 40h (2) 41h (3) 42h (4) 43h Fig 15. Luminance control SA ...
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Philips Semiconductors V (dB) (1) 03h (2) 13h (3) 23h (4) 33h Fig 16. Luminance control SA 09h, 3.58 MHz trap, prefilter off, different aperture 9397 750 14454 Product data sheet (1) (2) (4) 6 (3) 18 ...
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Philips Semiconductors LUM CHROMINANCE PREFILTER TRAP PREF BYPS VBLB PREFILTER SYNC MACROVISION DETECTOR SYNC SLICER SYNCHRONIZATION CIRCUIT 2 I C-BUS VNOI[1:0] CONTROL HTC[1: C-BUS VERTICAL INTERFACE PROCESSOR 46 47 SCL_AB SDA_AB This is valid for decoder A, B, ...
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Philips Semiconductors 8.6 Clock generation circuit The internal CGC generates all clock signals required for the video input processor. The internal signal LFCO is a digital-to-analog converted signal provided by the horizontal PLL the multiple of the line ...
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Philips Semiconductors LLCINT RESINT RES_N (internal reset) Fig 19. Power-on control circuit. Table 5: Internal power-on control sequence Pin output status Directly after power-on asynchronous reset Synchronous reset sequence Status after power-on control sequence 9397 750 14454 Product data sheet ...
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Philips Semiconductors 8.8 Multistandard VBI data slicer The multistandard data slicer is a Vertical Blanking Interval (VBI) and Full Field (FF) video data acquisition block. In combination with software modules the slicer acquires most existing formats of broadcast VBI and ...
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Philips Semiconductors (dB) Fig 20. Interpolation filter for the upsampled CVBS signal. 8.10 Digital output port The 8-bit VPO-bus can carry 16 data types in three different formats, selectable by the control registers LCR2 to LCR24 (see also (output enable ...
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Philips Semiconductors For each LCR value from the data type can be programmed individually. LCR2 to LCR23 refer to line numbers. The selection in LCR24 values is valid for the rest of the corresponding field. The upper ...
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Philips Semiconductors Table 8: Bit The generation of the H-bit and consequently the timing of SAV/EAV corresponds to the selected data format during active data region. For all data formats ...
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Philips Semiconductors Table 9: Line number 261 262 263 264 and 265 266 to 282 283 284 285 to 524 525 Table 10: Line number ...
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Table 11: Relationship of LCR to line numbers in 525 lines/60 Hz systems (part 1) Vertical line offset VOFF8 to VOFF0 = 00Ah; horizontal pixel offset HOFF10 to HOFF0 = 354h, FOFF = 1, FISET = 1 Line number (1st ...
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Table 14: Relationship of LCR to line numbers in 625 lines/50 Hz systems (part 2) Vertical line offset VOFF8 to VOFF0 = 007h; horizontal pixel offset HOFF10 to HOFF0 = 354h, FOFF = 1, FISET = 0 Line number (1st ...
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Philips Semiconductors 255 235 128 output range. Fig 21. Y-C a. For sources containing 7.5 IRE black Fig 22. Raw data levels on the 8-bit VPO-bus (data type 8). 9397 750 14454 Product data sheet 255 ...
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Philips Semiconductors Table 16: Y-C -C data format on the 8-bit VPO-bus (data types 6 and 15 Blanking Timing reference period code ... SAV C Table 17: Explanation to Table 16 Name Explanation ...
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Philips Semiconductors Table 21: Explanation to Table 20 Name Explanation IDI2 internal data identification 2: OP DLNn sliced data LOW nibble, format: NEP DLHn sliced data HIGH nibble, format: NEP EAV end of active data; see [1] Inverted EP (bit ...
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Philips Semiconductors Table 22: Code S Sr Slave address W Slave address R ACK-s ACK-m Subaddress Data LSB slave address read/write control bit order to write (the circuit is slave receiver); [1] The SAA7144HL ...
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Table 24: I C-bus receiver/transmitter overview Register function Subaddress Chip version (read only) 00h Increment delay 01h Analog control 1 02h Analog control 2 03h Analog control 3 04h Reserved 05h Horizontal sync begin 06h Horizontal sync stop 07h ...
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Table 24: I C-bus receiver/transmitter overview Register function Subaddress Horizontal offset 59h Vertical offset 5Ah Horizontal offset (MSBs), vertical offset 5Bh (MSB) and field offset For testability 5Ch Reserved 5Dh Sliced data identification code 5Eh Reserved 5Fh Slicer status ...
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Philips Semiconductors 2 9.3 I C-bus detail 2 The I C-bus receiver slave address is 48h/49h and 4Ah/4Bh. Subaddresses 05h, 12h, 14h to 1Eh, 20h to 3Fh, 5Ch, 5Dh, 5Fh and 63h to FFh are reserved. 9.3.1 Subaddress 00h (read ...
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Philips Semiconductors Fig 25. Mode switch for video inputs AI11 or AI12. 9.3.4 Subaddress 03h Table 28: Bit 9397 750 14454 Product data sheet AI12 AI11 MODE[3:0] Analog control 2 - bit ...
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Philips Semiconductors 9.3.5 Subaddress 04h Table 29: Analog control 3; static gain control Decimal value Gain (dB) Sign bit Control bits GAI18 0... 3 0 ...117... 0 0 ...511 6 1 9.3.6 Subaddress 06h Table 30: Horizontal ...
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Philips Semiconductors 9.3.8 Subaddress 08h Table 32: Sync control - bit description Bit Symbol Description 7 AUFD automatic field detection 0 = field state directly controlled via FSEL 1 = automatic field detection 6 FSEL field selection ...
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Philips Semiconductors Table 33: Luminance control - bit description Bit Symbol Description 3 VBLB vertical blanking luminance bypass 0 = active luminance processing 1 = chrominance trap and peaking stage are disabled during VBI lines determined by VREF = 0; ...
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Philips Semiconductors 9.3.12 Subaddress 0Ch Table 36: Chrominance saturation control Gain 1.999 (maximum) 1.0 (CCIR level) 0 (color off) 1 (inverse chrominance) 2 (inverse chrominance) 9.3.13 Subaddress 0Dh Table 37: Chrominance hue control Hue phase (deg) +178.6... ...0... ... 180 ...
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Philips Semiconductors Table 38: Chrominance control - bit description Bit Symbol Description and 0 CHBW[1:0] chrominance bandwidth 00 = small bandwidth ( 620 kHz nominal bandwidth ( 800 kHz medium bandwidth ( 920 ...
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Philips Semiconductors Table 41: VREF pulse position and length VRLN SA 10 (bit 3) VRLN VREF 525 lines 0 Length 240 Line number first last [1] Field 1 19 (22) 258 (261) [1] Field 2 282 (285) ...
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Philips Semiconductors 9.3.19 Subaddress 1Fh (read only register) Table 44: Status byte - bit description Bit Symbol Description 7 INTL status bit for interlace detection 0 = non-interlaced 1 = interlaced 6 HLCK status bit for locked horizontal frequency (OLDSB ...
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Philips Semiconductors Table 45: Slicer control - bit description Bit Symbol Description 2 and 1 CLKSEL[1:0] data slicer clock selection 00 = reserved 01 = 13.5 MHz (default reserved 11 = reserved 0 - not used; has to ...
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Philips Semiconductors 9.3.23 Subaddresses 59h and 5Bh Table 49: Horizontal offset - bit description Bit Symbol Description Subaddress 5Bh HOFF[10:8] horizontal offset; recommended value: 03h Subaddress 59h HOFF[7:0] horizontal offset; recommended value: 54h 9.3.24 ...
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Philips Semiconductors 9.3.27 Subaddress 60h (read only register) Table 53: Bit 7 6 and and 0 [ don’t care. 9.3.28 Subaddresses 61h and 62h (read only register) Table 54: Bit Subaddress 61h 7 ...
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Philips Semiconductors 2 Table 55: I C-bus start set-up values Subaddress Function (hexadecimal) 00 chip version 01 increment delay 02 analog control 1 03 analog control 2 04 analog control 3 05 reserved 06 horizontal sync begin 07 horizontal sync ...
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Philips Semiconductors 2 Table 55: I C-bus start set-up values Subaddress Function (hexadecimal) 60 slicer status 1 61 slicer status 2 62 slicer status reserved [1] All X values must be set to logic 0. For ...
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Philips Semiconductors 11. Limiting values Table 56: Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). All ground pins connected together and all supply pins connected together. Symbol Parameter V digital supply voltage DDD V analog supply ...
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Philips Semiconductors Table 58: Characteristics …continued DDD DDA Symbol Parameter V input voltage i(p-p) (peak-to-peak value) Z input impedance i C input capacitance i channel ...
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Philips Semiconductors Table 58: Characteristics …continued DDD DDA Symbol Parameter V LOW-level output voltage OL(clk) for LLC clock V HIGH-level output OH(clk) voltage for LLC ...
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Philips Semiconductors Table 58: Characteristics …continued DDD DDA Symbol Parameter R series resonance s resistor C motional capacitance 1 C parallel capacitance 0 [1] The ...
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Philips Semiconductors 14. Timing diagrams Fig 26. Clock/data output timing. CVBS input RAW DATA on VPO-bus Y-DATA on VPO-bus (1) See Fig 27. Horizontal timing diagram. 9397 750 14454 Product data sheet LLC t LLCH t OHD;DAT VPO 28 1/LLC ...
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V AGND C15 C17 100 nF 100 R18 18 AI11_A AI11_A 3 R19 18 AI12_A AI12_A 4 AI1D_A DNC1, R26 R30 R34 DNC4, 56 ...
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Philips Semiconductors 15.1 Recommended printed-circuit board layout The SAA7144HL consists of analog and digital areas. Due to this special care needs to be taken for design of layout regarding crosstalk by analog and digital supply interaction recommended to ...
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Philips Semiconductors 16. Test information 16.1 Boundary scan test The SAA7144HL has built-in logic and five dedicated pins to support boundary scan testing which allows board testing without special hardware (nails). The SAA7144HL follows the “IEEE Std. 1149.1 - Standard ...
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Philips Semiconductors 16.1.2 Device identification codes A device identification register is specified in “IEEE Std. 1149.1b-1994” 32-bit register which contains fields for the specification of the IC manufacturer, the IC part number and the IC version ...
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Philips Semiconductors 17. Package outline LQFP128: plastic low profile quad flat package; 128 leads; body 1 102 103 pin 1 index 128 1 e DIMENSIONS (mm are the original dimensions) A UNIT A A ...
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Philips Semiconductors 18. Soldering 18.1 Introduction to soldering surface mount packages This text gives a very brief insight to a complex technology. A more in-depth account of soldering ICs can be found in our Data Handbook IC26; Integrated Circuit Packages ...
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Philips Semiconductors – smaller than 1.27 mm, the footprint longitudinal axis must be parallel to the transport direction of the printed-circuit board. The footprint must incorporate solder thieves at the downstream end. • For packages with leads on four sides, ...
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Philips Semiconductors [4] These packages are not suitable for wave soldering. On versions with the heatsink on the bottom side, the solder cannot penetrate between the printed-circuit board and the heatsink. On versions with the heatsink on the top side, ...
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Philips Semiconductors 20. Data sheet status [1] Level Data sheet status Product status I Objective data Development II Preliminary data Qualification III Product data Production [1] Please consult the most recently issued data sheet before initiating or completing a design. ...
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Philips Semiconductors 25. Contents 1 General description . . . . . . . . . . . . . . . . . . . . . . 1 2 Features . . . . . . . . ...