EPC1441PC8N Altera, EPC1441PC8N Datasheet - Page 5

• Manufacturer Part Number: EPC1441PC8N
• Manufacturer: Altera

Specifications of EPC1441PC8N

• Function: Configuration Device
• Frequency (max): 16.7MHz
• Operating Supply Voltage (typ): 3.3/5V
• Operating Supply Voltage (max): 5.25V
• Operating Supply Voltage (min): 3V
• Operating Temperature Classification: Commercial
• Operating Temperature (min): 0C
• Operating Temperature (max): 70C
• Mounting: Through Hole
• Pin Count: 8
• Package Type: PDIP
• Lead Free Status / RoHS Status: Compliant

Chapter 4: Configuration Devices for SRAM-Based LUT Devices Data Sheet
Functional Description
Table 4–2. Configuration Devices Required (Part 4 of 4)
Figure 4–1. Configuration Device Block Diagram
Notes to
(1) The EPC1441 devices do not support data cascading. The EPC1, EPC2, and EPC1213 devices support data cascading.
(2) The OE pin is a bidirectional open-drain pin.
© December 2009
Stratix II
Notes to
(1) Raw Binary Files (.rbf) were used to determine these sizes.
(2) This is with the Cyclone series compression feature enabled.
(3) EP1S10 ES devices requires four EPC2 devices.
Figure
Family
Table
FPGA (except FLEX 8000) Configuration Using an EPC2, EPC1, or EPC1441
FLEX 8000 Device Configuration Using an EPC1, EPC1441, EPC1213, EPC1064, or EPC1064V
4–1:
4–2:
DCLK
(2)
Altera Corporation
nCS
nCS
OE
OE
Figure 4–1
EP2S130
EP2S180
EP2S15
EP2S30
EP2S60
EP2S90
Device
shows the configuration device block diagram.
Oscillator
Oscillator
Control
CLK
ENA
nRESET
Detection
Data Size (Bits)
Circuitry
Error
10,100,000
17,100,000
27,500,000
39,600,000
52,400,000
Register
EPROM
5,000,000
Array
Shift
(1)
Address
DATA
Address
Counter
Decode
Logic
EPC1064/
1064V
CLK
ENA
nRESET
EPROM
Register
—
—
—
—
—
—
Array
Shift
Address
DATA
Address
Counter
EPC1213
Configuration Handbook (Complete Two-Volume Set)
—
—
—
—
—
—
Decode
Logic
DATA
nCASC
EPC1441
—
—
—
—
—
—
(1)
DCLK
EPC1
nCASC
—
—
—
—
—
—
DATA
(1)
EPC2
11
17
24
31
3
7
4–5