A2550KLP-T Allegro Microsystems Inc, A2550KLP-T Datasheet
A2550KLP-T
Specifications of A2550KLP-T
Related parts for A2550KLP-T
A2550KLP-T Summary of contents
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Features and Benefits ▪ Three independent low-side DMOS output drivers ▪ Short-circuit protection of drivers ▪ Eliminates need for flyback diodes on relays ▪ Thermal shutdown ▪ Separate precision 5 V regulator (2%) ▪ Current clamp regulator ...
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... The A2550 is supplied in a 16-pin TSSOP package with exposed thermal pad (package LP).The package is lead (Pb) free, with 100% matte tin leadframe plating. Selection Guide Part Number A2550KLPTR-T 13-in. reel, 4000 pieces / reel Absolute Maximum Ratings Characteristic Supply Voltage High Voltage Enable ...
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A2550 CBB Micro Controller Component Selection Table Name CBB CREG5 CWD, CPOR Relay Driver with 5 V Regulator Functional Block Diagram Hi-V Enable VBB ENBAT Hi-V Protection TSD 5V VREG5 Linear CREG5 Regulator μF X7R Enable EN ...
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A2550 ELECTRICAL CHARACTERISTICS, –40°C ≤ T Characteristics Supply VBB Operating Voltage 1 VBB Supply Current Logic Inputs ENBAT Input Voltage 2 EN, WDI, and INx Input Voltage ENBAT, EN, WDI, INx Input Voltage Hysteresis ENBAT Input Current 2,3 EN Input ...
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A2550 ELECTRICAL CHARACTERISTICS, continued –40°C ≤ T Characteristics Watchdog and Power-On Reset NPOR Active Voltage NPOR Inactive Leakage Current CWD and CPOR Trip Voltage CPOR Charge Current 5 Power-On Reset Cycle Time CWD Charge Current Thermal Protection Thermal Shut Down ...
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A2550 0.01 Figure 1. Dynamic thermal impedance of an individual output stage during active clamp of an inductive load (mounted on a 4-layer PCB based on JEDEC standard). Nonrepetitive ...
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A2550 Pin Descriptions EN Enable pin; logical OR with ENBAT. This logic-level input enables the A2550. If there are no faults, the regulator is live and outputs can be switched. When both the EN and ENBAT pins are held low, ...
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A2550 Timing Diagram: Initial Start-up and Exiting Sleep Mode VBB VREG5 WDI CWD EN or ENBAT CPOR NPOR OUTx Relay Driver with 5 V Regulator Internal V ref t POR Internal V ref ~INx 1 2 ...
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A2550 VREG5 WDI CWD CPOR NPOR OUTx outputs enabled Relay Driver with 5 V Regulator Timing Diagram: Watchdog Monitoring WDR Missing watchdog detected (WDI low). NPOR pulses generated periodically. NPOR ...
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A2550 Timing Diagram: VREG5 UVLO and TSD Monitoring VBB VREG5 WDI CWD Internal VREG5 UVLO CPOR NPOR Internal TSD OUTx Relay Driver with 5 V Regulator outputs enabled ~INx VREG5 undervoltage ...
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A2550 Dropout Voltage For operation with V below the specified range of operat- BB ing voltages, use the Pass Transistor On-Resistance R to determine the maximum allowed regulator current This current is limited by the difference between REG5(max) ...
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A2550 NPOR is pulsed for a watchdog fault. For the remaining faults, NPOR is held low for the duration of the fault. After the fault condition is removed, NPOR remains low during the t period. The latter is set by ...
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A2550 × DS(on) LS1 DS(on × DS(on) LS3 Because 110 mA , and LS1 LS2 LS3 given that R ...
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A2550 A more rigorous derivation, including R exponential current decay results in ⎡ ⎢ ⎢ ⎣ COIL COIL and L t COIL ln – ...
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A2550 5.00 ±0. 3.00 16X 0.10 C +0.05 0.65 0.25 –0.06 Copyright ©2006-2010, Allegro MicroSystems, Inc. The products described here are manufactured under one or more U.S. patents or U.S. patents pending. Allegro MicroSystems, Inc. ...