PI74VCX16373AEX Pericom Semiconductor, PI74VCX16373AEX Datasheet - Page 7

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PI74VCX16373AEX

Manufacturer Part Number
PI74VCX16373AEX
Description
IC 16BIT D TRANSP LATCH 48TSSOP
Manufacturer
Pericom Semiconductor
Type
D-Typer
Series
74VCXr
Datasheet

Specifications of PI74VCX16373AEX

Logic Family
VCX
Number Of Bits
16
Number Of Elements
2
Latch Mode
Transparent
Polarity
Non-Inverting
Technology
CMOS
Package Type
TSSOP
Propagation Delay Time
7ns
Operating Supply Voltage (typ)
2.5/3.3V
High Level Output Current
-24mA
Low Level Output Current
24mA
Operating Supply Voltage (min)
1.8V
Operating Supply Voltage (max)
3.6V
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
48
Output Type
3-State
Logic Type
D-Type Transparent Latch
Circuit
8:8
Voltage - Supply
1.8 V ~ 3.6 V
Independent Circuits
2
Delay Time - Propagation
1.5ns
Current - Output High, Low
6mA, 6mA
Operating Temperature
-40°C ~ 85°C
Mounting Type
*
Package / Case
*
Lead Free Status / RoHS Status
Compliant
1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1 2 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1 2 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1 2 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1 2 1 2 3 4 5 6 7 8 9 0 1 2
1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1 2 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1 2 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1 2 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1 2 1 2 3 4 5 6 7 8 9 0 1 2
Test Circuits and Switching Waveforms
Parameter Measurement Information (V
Setup, Hold, and Release Timing
Notes:
A. C
B. Waveform 1 is for an output with internal conditions such that
the output is LOW except when disabled by the output control.
Waveform 2 is for an output with internal conditions such that
the output is HIGH except when disabled by the output control.
following characteristics: P
measured from 10% to 90%, unless otherwise specified.
measurement.
Timing
From Output
Input
Input
Data
Under Test
All input pulses are supplied by generators having the
The outputs are measured one at a time with one transition per
L
includes probe and jig capacitance.
06-0203
(See Note A)
t
30pF
SU
RR
C
L
≤ 10 MHz, Z
t
H
R
500Ω
500Ω
L
O
R
= 50Ω, t
1
DD
= 1.8V - 3.6V)
R
≤ 2ns, t
2 x V
Open
DD
GND
F
V
V
0V
V
V
0V
≤ 2ns,
DD
DD/2
DD
DD/2
7
Switch Position
Pulse Width
Propagaton Delay
Enable Disable Timing
Opposite Phase
t
t
t
High-Low-High
Input Transition
S1 at 2xV
Low-High-Low
Waveform 1
Waveform 2
P
P
P
(Active LOW)
(see Note B)
(see Note B)
D
L
H
S1 at GND
Z
Z
t /
t /
P
P
e T
Control
Output
Z
Output
Output
Z
L
H
t s
Output
Input
Pulse
Pulse
DD
O
2
G
t
t
PZL
PZH
N
p
x
n e
t
D
t
V
PLH
PHL
D
D
S
1
16-Bit Transparent D-Type Latch
V
V
V
DD/2
DD/2
t
W
DD
t
t
PLZ
PHZ
with 3-State Outputs
PI74VCX16373
PS8326C
+0.15V
-0.15V
t
t
PHL
PLH
0V
V
V
V
V
0V
V
DD
DD
DD/2
DD/2
V
V
V
V
V
10/27/06
V
V
V
V
V
V
0V
DD
0V
DD/2
DD/2
DD/2
DD
0V
DD
0V
DD
DD
OL
DD
OH
OL
/2

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