LFXP20C-4FN388C LATTICE SEMICONDUCTOR, LFXP20C-4FN388C Datasheet - Page 12
![no-image](/images/manufacturer_photos/0/3/381/lattice_semiconductor_sml.jpg)
LFXP20C-4FN388C
Manufacturer Part Number
LFXP20C-4FN388C
Description
FPGA LatticeXP Family 20000 Cells 360MHz 130nm (CMOS) Technology 1.8V/2.5V/3.3V 388-Pin FBGA Tray
Manufacturer
LATTICE SEMICONDUCTOR
Datasheet
1.LFXP3C-3QN208C.pdf
(130 pages)
Specifications of LFXP20C-4FN388C
Package
388FBGA
Family Name
LatticeXP
Device Logic Units
20000
Maximum Internal Frequency
360 MHz
Typical Operating Supply Voltage
1.8|2.5|3.3 V
Maximum Number Of User I/os
268
Ram Bits
405504
Re-programmability Support
Yes
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
LFXP20C-4FN388C
Manufacturer:
Lattice Semiconductor Corporation
Quantity:
10 000
Company:
Part Number:
LFXP20C-4FN388C-31
Manufacturer:
LATTICE
Quantity:
5
- Current page: 12 of 130
- Download datasheet (2Mb)
Architecture
Lattice Semiconductor
LatticeXP Family Data Sheet
Figure 2-8. Per Quadrant Secondary Clock Selection
20 Secondary Clock Feedlines : 4 Clock Input Pads + 16 Routing Signals
4 Secondary Clocks per Quadrant
Figure 2-9. Slice Clock Selection
Primary Clock
Secondary Clock
Clock to Each Slice
Routing
GND
sysCLOCK Phase Locked Loops (PLLs)
The PLL clock input, from pin or routing, feeds into an input clock divider. There are three sources of feedback sig-
nals to the feedback divider: from CLKOP (PLL internal), from clock net (CLKOP or CLKOS) or from a user clock
(PIN or logic). There is a PLL_LOCK signal to indicate that VCO has locked on to the input clock signal. Figure 2-
10 shows the sysCLOCK PLL diagram.
The setup and hold times of the device can be improved by programming a delay in the feedback or input path of
the PLL which will advance or delay the output clock with reference to the input clock. This delay can be either pro-
grammed during configuration or can be adjusted dynamically. In dynamic mode, the PLL may lose lock after
adjustment and not relock until the t
parameter has been satisfied. Additionally, the phase and duty cycle block
LOCK
allows the user to adjust the phase and duty cycle of the CLKOS output.
The sysCLOCK PLLs provide the ability to synthesize clock frequencies. Each PLL has four dividers associated
with it: input clock divider, feedback divider, post scalar divider and secondary clock divider. The input clock divider
is used to divide the input clock signal, while the feedback divider is used to multiply the input clock signal. The post
scalar divider allows the VCO to operate at higher frequencies than the clock output, thereby increasing the fre-
quency range. The secondary divider is used to derive lower frequency outputs.
2-9
Related parts for LFXP20C-4FN388C
Image
Part Number
Description
Manufacturer
Datasheet
Request
R
![LFXP20C-3F256C](/images/manufacturer_photos/0/3/381/lattice_semiconductor_tmb.jpg)
Part Number:
Description:
FPGA LatticeXP Family 20000 Cells 320MHz 130nm (CMOS) Technology 1.8V/2.5V/3.3V 256-Pin FBGA Tray
Manufacturer:
LATTICE SEMICONDUCTOR
Datasheet:
![LFXP20C-3FN388C](/images/manufacturer_photos/0/3/381/lattice_semiconductor_tmb.jpg)
Part Number:
Description:
FPGA LatticeXP Family 20000 Cells 320MHz 130nm (CMOS) Technology 1.8V/2.5V/3.3V 388-Pin FBGA Tray
Manufacturer:
LATTICE SEMICONDUCTOR
Datasheet:
![LFXP20C-4FN256C](/images/manufacturer_photos/0/3/381/lattice_semiconductor_tmb.jpg)
Part Number:
Description:
FPGA LatticeXP Family 20000 Cells 360MHz 130nm (CMOS) Technology 1.8V/2.5V/3.3V 256-Pin FBGA Tray
Manufacturer:
LATTICE SEMICONDUCTOR
Datasheet:
![LFXP20C-5F256C](/images/manufacturer_photos/0/3/381/lattice_semiconductor_tmb.jpg)
Part Number:
Description:
FPGA LatticeXP Family 20000 Cells 400MHz 130nm (CMOS) Technology 1.8V/2.5V/3.3V 256-Pin FBGA Tray
Manufacturer:
LATTICE SEMICONDUCTOR
Datasheet:
![LFXP20C-5FN256C](/images/manufacturer_photos/0/3/381/lattice_semiconductor_tmb.jpg)
Part Number:
Description:
FPGA LatticeXP Family 20000 Cells 400MHz 130nm (CMOS) Technology 1.8V/2.5V/3.3V 256-Pin FBGA Tray
Manufacturer:
LATTICE SEMICONDUCTOR
Datasheet:
![lfxp20c-5f388c](/images/manufacturer_photos/0/3/382/lattice_semiconductor_corp__tmb.jpg)
Part Number:
Description:
Latticexp Fpga Data Sheets
Manufacturer:
Lattice Semiconductor Corp.
Datasheet:
![ISPLSI2032-80LT44](/images/manufacturer_photos/0/3/382/lattice_semiconductor_corp__tmb.jpg)
Part Number:
Description:
ISPLSI2032-80LT44Lattice Semiconductor [In-System Programmable High Density PLD]
Manufacturer:
Lattice Semiconductor Corp.
Datasheet:
![GAL16V8D5LJ](/images/manufacturer_photos/0/3/382/lattice_semiconductor_corp__tmb.jpg)
Part Number:
Description:
IC PROGRAMMED LATTICE GAL 16V8
Manufacturer:
Lattice Semiconductor Corp.
Datasheet:
![GAL6002B-20LP](/images/manufacturer_photos/0/3/382/lattice_semiconductor_corp__tmb.jpg)
Part Number:
Description:
357-036-542-201 CARDEDGE 36POS DL .156 BLK LOPRO
Manufacturer:
Lattice Semiconductor Corp.
Datasheet:
![GAL6001B-30LP](/images/manufacturer_photos/0/3/382/lattice_semiconductor_corp__tmb.jpg)
Part Number:
Description:
357-036-542-201 CARDEDGE 36POS DL .156 BLK LOPRO
Manufacturer:
Lattice Semiconductor Corp.
Datasheet:
![GAL18V10B-15LP](/images/manufacturer_photos/0/3/382/lattice_semiconductor_corp__tmb.jpg)
Part Number:
Description:
357-036-542-201 CARDEDGE 36POS DL .156 BLK LOPRO
Manufacturer:
Lattice Semiconductor Corp.
Datasheet:
![GAL16V8D-15LPI](/images/manufacturer_photos/0/3/382/lattice_semiconductor_corp__tmb.jpg)
Part Number:
Description:
357-036-542-201 CARDEDGE 36POS DL .156 BLK LOPRO
Manufacturer:
Lattice Semiconductor Corp.
Datasheet:
![GAL16V8D-15LJI](/images/manufacturer_photos/0/3/382/lattice_semiconductor_corp__tmb.jpg)
Part Number:
Description:
357-036-542-201 CARDEDGE 36POS DL .156 BLK LOPRO
Manufacturer:
Lattice Semiconductor Corp.
Datasheet:
![ISPLSI2032-80LJI](/images/manufacturer_photos/0/3/382/lattice_semiconductor_corp__tmb.jpg)
Part Number:
Description:
357-036-542-201 CARDEDGE 36POS DL .156 BLK LOPRO
Manufacturer:
Lattice Semiconductor Corp.
Datasheet: