DP83932CVF20 National Semiconductor, DP83932CVF20 Datasheet - Page 23

• Manufacturer Part Number: DP83932CVF20
• Manufacturer: National Semiconductor

Specifications of DP83932CVF20

• Operating Supply Voltage (typ): 5V
• Operating Supply Voltage (min): 4.75V
• Operating Supply Voltage (max): 5.25V
• Mounting: Surface Mount
• Pin Count: 132
• Lead Free Status / RoHS Status: Not Compliant

4 0 SONIC Registers
SONIC is in software reset The CDA resides in the same
64k byte block of memory as the Receive Resource Area
(RRA) and contains descriptors for loading the CAM regis-
ters These descriptors are contiguous and each descriptor
consists of four 16-bit fields (Figure 4-2) In 32-bit mode the
upper word D
the value to be loaded into the CAM Entry Pointer and the
remaining fields are for the three CAM Address Ports (see
Section 4 3 10) In addition there is one more field after the
last descriptor containing the mask for the CAM Enable reg-
ister Each of the CAM descriptors are addressed by the
CAM Descriptor Pointer (CDP) register
After the system has initialized the CDA it can issue the
Load CAM command to program the SONIC to read the
CDA and load the CAM The procedure for issuing the Load
CAM command is as follows
1 Initialize the Upper Receive Resource Address (URRA)
register Note that the CAM Descriptor Area must reside
within the same 64k Page as the Receive Resource
Area (See Section 4 3 9)
k
31 16
l
is not used The first field contains
(Continued)
FIGURE 4-2 CAM Descriptor Area Format
FIGURE 4-1 CAM Organization
23
2 Initialize the CDA as described above
3 Initialize the CAM Descriptor Count with the number of
4 Initialize the CAM Descriptor Pointer to locate the first
5 Issue the Load CAM command (LCAM) in the Command
If a transmission or reception is in progress the CAM DMA
function will not occur until these operations are complete
When the SONIC completes the Load CAM command the
CDP register points to the next location after the CAM en-
able field and the CDC equals zero The SONIC resets the
LCAM bit in the Command register and sets the Load CAM
Done (LCD) bit in the ISR
CAM descriptors Note only the lower 5 bits are used in
this register The other bits are don’t cares (See Section
4 3 10)
descriptor in the CDA This register must be reloaded
each time a new Load CAM command is issued
register (See Section 4 3 1)
TL F 10492– 22
TL F 10492 – 21