LCMXO2-1200ZE-1MG132IR1 Lattice, LCMXO2-1200ZE-1MG132IR1 Datasheet - Page 36

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LCMXO2-1200ZE-1MG132IR1

Manufacturer Part Number
LCMXO2-1200ZE-1MG132IR1
Description
IC PLD 1280LUTS 105I/O 132CSBGA
Manufacturer
Lattice
Datasheet

Specifications of LCMXO2-1200ZE-1MG132IR1

Programmable Type
*
Number Of Macrocells
*
Voltage - Input
*
Speed
*
Mounting Type
*
Package / Case
*
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
220-1143

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
LCMXO2-1200ZE-1MG132IR1
Manufacturer:
Lattice
Quantity:
360
Lattice Semiconductor
For more information on the UFM, please refer to TN1205,
tions in MachXO2
Standby Mode and Power Saving Options
MachXO2 devices are available in three options for maximum flexibility: ZE, HC and HE devices. The ZE devices
have ultra low static and dynamic power consumption. These devices use a 1.2V core voltage that further reduces
power consumption. The HC and HE devices are designed to provide high performance. The HC devices have a
built-in voltage regulator to allow for 2.5V V
MachXO2 devices have been designed with features that allow users to meet the static and dynamic power
requirements of their applications by controlling various device subsystems such as the bandgap, power-on-reset
circuitry, I/O bank controllers, power guard, on-chip oscillator, PLLs, etc. In order to maximize power savings,
MachXO2 devices support an ultra low power Stand-by mode. While most of these features are available in all
three device types, these features are mainly intended for use with MachXO2 ZE devices to manage power con-
sumption.
In the stand-by mode the MachXO2 devices are powered on and configured. Internal logic, I/Os and memories are
switched on and remain operational, as the user logic waits for an external input. The device enters this mode
when the standby input of the standby controller is toggled or when an appropriate I
by an external master. Various subsystems in the device such as the band gap, power-on-reset circuitry etc can be
configured such that they are automatically turned “off” or go into a low power consumption state to save power
when the device enters this state.
Table 2-18. MachXO2 Power Saving Features Description
Bandgap
Power-On-Reset (POR)
On-Chip Oscillator
PLL
I/O Bank Controller
Dynamic Clock Enable for Primary
Clock Nets
Power Guard
For more details on the standby mode refer to TN1198,
Power On Reset
MachXO2 devices have power-on reset circuitry to monitor V
operation. At power-up, the POR circuitry monitors V
Device Subsystem
Devices.
The bandgap can be turned off in standby mode. When the Bandgap is turned off, ana-
log circuitry such as the POR, PLLs, on-chip oscillator, and referenced and differential 
I/O buffers are also turned off. Bandgap can only be turned off for 1.2V devices.
The POR can be turned off in standby mode. This monitors VCC levels. In the event of
unsafe V
off, limited power detector circuitry is still active. This option is only recommended for ap-
plications in which the power supply rails are reliable.
The on-chip oscillator has two power saving features. It may be switched off if it is not
needed in your design. It can also be turned off in Standby mode.
Similar to the on-chip oscillator, the PLL also has two power saving features. It can be
statically switched off if it is not needed in a design. It can also be turned off in Standby
mode. The PLL will wait until all output clocks from the PLL are driven low before power-
ing off.
Referenced and differential I/O buffers (used to implement standards such as HSTL,
SSTL and LVDS) consume more than ratioed single-ended I/Os such as LVCMOS and
LVTTL. The I/O bank controller allows the user to turn these I/Os off dynamically on a
per bank selection.
Each primary clock net can be dynamically disabled to save power.
Power Guard is a feature implemented in input buffers. This feature allows users to
switch off the input buffer when it is not needed. This feature can be used in both clock
and data paths. Its biggest impact is that in the standby mode it can be used to switch off
clock inputs that are distributed using general routing resources.
CC
CC
drops, this circuit reconfigures the device. When the POR circuitry is turned
and 3.3V V
CCINT
2-32
Power Estimation and Management for MachXO2
CC
Using User Flash Memory and Hardened Control Func-
while the HE devices operate at 1.2V V
and V
CCINT
Feature Description
CCIO0
and V
(controls configuration) voltage levels. It
CCIO
MachXO2 Family Data Sheet
voltage levels during power-up and
2
C or JTAG instruction is issued
Architecture
CC
.
Devices.

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