ICS557G-06LF IDT, Integrated Device Technology Inc, ICS557G-06LF Datasheet - Page 2

• Manufacturer Part Number: ICS557G-06LF
• Description: IC CLK BUFFER 1:4 HCSL 20-TSSOP
• Manufacturer: IDT, Integrated Device Technology Inc
• Type: Clock Bufferr

Specifications of ICS557G-06LF

• Input: HCSL, LVDS
• Output: HCSL, LVDS
• Frequency - Max: 200MHz
• Voltage - Supply: 3.135 V ~ 3.465 V
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: Surface Mount
• Package / Case: 20-TSSOP
• Frequency-max: 200MHz
• Number Of Clock Inputs: 2
• Mode Of Operation: Differential
• Output Logic Level: HCSL/LVDS
• Operating Supply Voltage (min): 3.135V
• Operating Supply Voltage (typ): 3.3V
• Operating Supply Voltage (max): 3.465V
• Package Type: TSSOP
• Operating Temp Range: 0C to 70C
• Operating Temperature Classification: Commercial
• Signal Type: HCSL/LVDS
• Mounting: Surface Mount
• Pin Count: 20
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 557G-06LF; 800-1064; 800-1064-5; 800-1064

Pin Assignment
Pin Descriptions
IDT® 2 TO 4 DIFFERENTIAL CLOCK MUX
ICS557-06
2 TO 4 DIFFERENTIAL CLOCK MUX
Pin
10
11
12
13
14
15
16
17
18
19
20
1
2
3
4
5
6
7
8
9
VDDOUT
VDDIN
Rr(IREF)
VDDIN
IREF
Name
GND
CLKD
CLKD
CLKC
CLKC
CLKB
CLKB
CLKA
CLKA
SEL
GND
GND
IN2
IN2
SEL
IN1
IN1
PD
OE
Pin
IN1
IN1
IN2
IN2
OE
PD
20-pin (173 mil) TSSOP
10
1
2
3
4
5
6
7
8
9
Output Precision resistor attached to this pin is connected to the internal current
Output Differential Complimentary output clock D.
Output Differential True output clock D.
Output Differential Complimentary output clock C.
Output Differential True output clock C.
Output
Output
Output
Output
Power
Power
Power
Power
Type
Input
Input
Input
Input
Input
Input
Input
Pin
20
19
18
17
16
15
14
13
12
11
SEL=1 selects IN1/IN1. SEL =0 selects IN2/ IN2. Internal pull-up resistor.
Connect to +3.3 V. Supply voltage for Input clocks.
HCSL/LVDS true input signal 1.
HCSL/LVDS complimentary input signal 1.
Powers down the chip and tri-states outputs when low. Internal pull-up
HCSL/LVDS true input signal 2.
HCSL/LVDS complimentary input signal 2.
Provides fast output on, tri-states output (High = enable outputs; Low =
disable). Internal pull-up resistor outputs.
Connect to ground.
Connect to +3.3 V. Supply Voltage for Output Clocks.
Connect to ground.
Differential Complimentary output clock B.
Differential True output clock B.
Differential Complimentary output clock A.
Differential True output clock A.
CLKA
CLKA
CLKB
CLKB
GND
VDD
CLKC
CLKC
CLKD
CLKD
2
Select Table
Pin Description
SEL
0
1
Input Pair
selected
IN2/ IN2
IN1/ IN1
PCIE FAN OUT BUFFER
ICS557-06
REV J 121510