AD800-52BRZ Analog Devices Inc, AD800-52BRZ Datasheet
AD800-52BRZ
Specifications of AD800-52BRZ
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AD800-52BRZ Summary of contents
Page 1
... The VCO provides a clock output within 20% of the device center frequency in the absence of input data. The AD800 and AD802 exhibit virtually no pattern jitter, due to the performance of the patented phase detector. Total loop jitter is 20 peak-to-peak. Jitter bandwidth is dictated by mask programmable fractional loop bandwidth. The AD800, used for data rates < ...
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... –2– GND Loop Damping MAX CC A MIN MAX AD800-52BR AD802-155KR/BR Min Typ Max Min Typ Max 51.84 155. –40 85 – 155 156 49 53 155 156 11.5 ...
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... Ceramic DIP Package . . . . . . . . . . . . . . . . . . . . . . +175 C Storage Temperature Range . . . . . . . . . . . . – +150 C Lead Temperature Range (Soldering 60 sec +300 C ESD Rating AD800 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1500 V AD802 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1000 V *Stresses above those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress rating only; functional operation of the device at these or any other conditions above those indicated in the operational section of this specification is not implied ...
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... Bit Error Rate vs. Signal-to-Noise Ratio The AD800 and AD802 were designed to operate with standard ECL signal levels at the data input. Although not recom- mended, smaller input signals are tolerable. Figure 8, 14, and ...
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... Figure 4. AD800-45 Jitter vs. Temperature 100 100 1E-1 5E-2 3E-2 2E-2 1E-2 1E-3 1E-4 1E-5 1E-7 1E-9 1E-11 0.20 0.25 0.30 Figure 8. AD800-45 Bit Error Rate vs. Input Jitter –5– – AD800/AD802 – TEMPERATURE – C AD800-45 DS-3 MASK JITTER FREQUENCY – Hz Figure 6 ...
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... Figure 10. AD800-52 Jitter vs. Temperature 100 100 10 1E-1 5E-2 3E-2 2E-2 1E-2 1E-3 1E-4 1E-5 1E-6 1E-8 1E-10 0.20 0.25 0.30 Figure 14. AD800-52 Bit Error Rate vs. Input Jitter –6– – TEMPERATURE – C AD800-52 OC-1 MASK JITTER FREQUENCY – Hz Figure 12. AD800-52 Jitter Tolerance 80 ...
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... Figure 20. AD802-155 Bit Error Rate vs. Input Jitter to V MAX –7– AD800/AD802 – TEMPERATURE – C AD802-155 CCITT G.958 STM1 TYPE A MASK JITTER FREQUENCY – Hz Figure 18. AD802-155 Jitter Tolerance ...
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... The jitter bandwidths of the AD800-45 and AD800-52 are 0.1% of the respective center frequencies. The jitter bandwidth of the AD800 or the AD802 is mask programmable from 0.01 the center frequency. A device with a very low loop bandwidth (0.01% of the center frequency) could effectively filter (clean up) a jittery timing reference ...
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... F 2.5 TO DEVICE 0.1 F 2.0 BEAD WITH TWO LOOPS 1.5 TO DEVICE 0.1 F 1.0 BEAD WITH TWO LOOPS 0.5 TO DEVICE 0 Figure 24. AD802-155 Output Jitter vs. Supply Noise (PECL Configuration) –9– AD800/AD802 5.0V C17 0.1 FRAC FRAC R23 R22 130 10H116 R24 80 130 11 ...
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... ASUBST 2 Z1 AD800/802 –5.2V Description Resistor, 100 , 1% Resistor, 154 , 1% Resistor, 80 Resistor, 130 , 1% Resistor, 274 , 1% Capacitor, Loop Damping (See Specifications Page) Capacitor Tantalum Capacitor, 0.1 F, Ceramic Chip AD800/AD802 10H116, ECL Line Receiver –10– AD802-155 PINS 8, 13, PINS 10, 15, 18 PIN 3 –5.2V —5.2V ...
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... Figure 27. Negative Supply Configuration: Component Side (Top Layer) Figure 28. Negative Supply Configuration: Solder Side REV. B Figure 29. Positive Supply Configuration: Component Side (Top Layer) Figure 30. Positive Supply Configuration: Solder Side –11– AD800/AD802 ...
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... AD800/AD802 0.200 (5.08) MAX 0.200 (5.08) 0.125 (3.18) OUTLINE DIMENSIONS Dimensions shown in inches and (mm). 20-Pin Small Outline IC Package (R-20) 0.512 (13.00) 0.496 (12.60 0.300 (7.60) 0.292 (7.40 0.50 (1.27) 0.019 (0.48) BSC 0.014 (0.36) 0.011 (0.28) 0.004 (0.10) 0.015 (0.38) 0.050 (1.27) ...