SI5319C-C-GMR Silicon Laboratories Inc, SI5319C-C-GMR Datasheet - Page 10

• Manufacturer Part Number: SI5319C-C-GMR
• Description: IC CLOCK MULT/ATTENUATOR 36QFN
• Manufacturer: Silicon Laboratories Inc

Specifications of SI5319C-C-GMR

• Input: *
• Output: *
• Frequency - Max: *
• Voltage - Supply: *
• Operating Temperature: *
• Mounting Type: Surface Mount
• Package / Case: 36-VFQFN Exposed Pad
• Frequency-max: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Si5319
10
Table 4. AC Specifications (Continued)
(V
Input Duty Cycle
(Minimum Pulse
Width)
Input Capacitance
Input Rise/Fall Time
CKOUT Output Pins
(See ordering section for speed grade vs frequency limits)
Output Frequency
(Output not config-
ured for CMOS or
Disabled)
Maximum Output
Frequency in CMOS
Format
Output Rise/Fall
(20–80 %) @
622.08 MHz output
Output Rise/Fall
(20–80%) @
212.5 MHz output
Output Rise/Fall
(20–80%) @
212.5 MHz output
Output Duty Cycle
Uncertainty @
622.08 MHz
LVCMOS Input Pins
Minimum Reset Pulse
Width
Reset to Microproces-
sor Access Ready
Input Capacitance
DD
= 1.8 ± 5%, 2.5 ±10%, or 3.3 V ±10%, T
Parameter
CKO
CKO
CKO
Symbol
CKN
CKN
CKN
CKO
t
t
CKO
CKO
RSTMN
READY
C
in
TRF
TRF
TRF
TRF
CIN
DC
DC
F
F
Output not configured for
A
Measured at 50% Point
limitation applies only
Whichever is smaller
= –40 to 85 °C)
(i.e., the 40% / 60%
CMOS or Disabled
to high-frequency
Test Condition
(Not for CMOS)
CMOS Output
CMOS Output
C
C
See Figure 2
See Figure 2
100  Load
Line-to-Line
V
V
LOAD
LOAD
20–80%
DD
DD
clocks)
N1 = 5
N1 = 4
N1  6
= 1.71
= 2.97
= 5 pF
= 5 pF
Rev. 1.0
1.213
0.002
Min
970
40
—
—
—
—
—
—
—
—
—
2
1
Typ
230
—
—
—
—
—
—
—
—
—
—
—
—
—
—
212.5
+/-40
1134
Max
945
350
1.4
60
—
11
—
10
3
8
2
3
MHz
MHz
MHz
Unit
GHz
ms
pF
pF
ns
ns
ps
ns
ns
ps
µs
%