SI5319C-C-GM Silicon Laboratories Inc, SI5319C-C-GM Datasheet - Page 40

• Manufacturer Part Number: SI5319C-C-GM
• Description: IC CLOCK MULT/ATTENUATOR 36QFN
• Manufacturer: Silicon Laboratories Inc

Specifications of SI5319C-C-GM

• Input: *
• Output: *
• Frequency - Max: *
• Voltage - Supply: *
• Operating Temperature: *
• Mounting Type: Surface Mount
• Package / Case: 36-VFQFN Exposed Pad
• Frequency-max: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Si5319
5. Pin Descriptions: Si5319
40
Note: Internal register names are indicated by underlined italics (e.g., INT_PIN. See Si5319 Register Map).
2, 4, 9,
12–14,
33–35
5, 10,
Pin #
30,
32
1
3
Pin Name
INT_CB
RST
V
NC
DD
V
I/O
—
O
DD
I
Signal Level
LVCMOS
LVCMOS
Supply
—
INT_CB
GND
VDD
RST
NC
NC
XB
NC
XA
1
2
3
4
5
6
7
8
9
External Reset.
Active low input that performs external hardware reset of device.
Resets all internal logic to a known state and forces the device regis-
ters to their default value. Clock outputs are disabled during reset. The
part must be programmed after a reset or power-on to get a clock out-
put. See Family Reference Manual for details.
This pin has a weak pull-up.
No Connection.
Leave floating. Make no external connections to this pin for normal
operation.
Interrupt/CKIN Invalid Indicator.
This pin functions as a device interrupt output or an alarm output for
CKIN. If used as an interrupt output, INT_PIN must be set to 1. The pin
functions as a maskable interrupt output with active polarity controlled
by the INT_POL register bit.
If used as an alarm output, the pin functions as a LOS alarm indicator
for CKIN. Set CK_BAD_PIN = 1 and INT_PIN = 0.
0 = CKIN present.
1 = LOS on CKIN.
The active polarity is controlled by CK_BAD_POL. If no function is
selected, the pin tristates.
Supply.
The device operates from a 1.8, 2.5, or 3.3 V supply. Bypass capaci-
tors should be associated with the following V
5
10
32
A 1.0 µF should also be placed as close to the device as is practical.
36
10 11 12 13 14 15 16 17
35
34
0.1 µF
0.1 µF
0.1 µF
33
Rev. 1.0
GND
Pad
32
31
30
29
28
18
27
26
25
24
23
22
21
20
19
SDI
A2_SS
A1
A0
SDA_SDO
SCL
CS
GND
GND
Description
DD
pins: