PI6C48535-01LE Pericom Semiconductor, PI6C48535-01LE Datasheet - Page 2

IC CLOCK BUFFER 20-TSSOP

PI6C48535-01LE

Manufacturer Part Number
PI6C48535-01LE
Description
IC CLOCK BUFFER 20-TSSOP
Manufacturer
Pericom Semiconductor
Type
Fanout Buffer (Distribution), Multiplexerr
Datasheet

Specifications of PI6C48535-01LE

Number Of Circuits
1
Ratio - Input:output
2:4
Differential - Input:output
No/Yes
Input
LVCMOS, LVTTL
Output
LVPECL
Frequency - Max
500MHz
Voltage - Supply
3 V ~ 3.6 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
20-TSSOP
Frequency-max
500MHz
Output Logic Level
LVPECL
Supply Voltage (max)
3.6 V
Supply Voltage (min)
3 V
Maximum Operating Temperature
+ 85 C
Max Output Freq
500 MHz
Minimum Operating Temperature
- 40 C
Mounting Style
SMD/SMT
Number Of Clock Inputs
2
Number Of Outputs
16
Supply Current
60 mA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
PI6C48535-01LE
Manufacturer:
Pericom
Quantity:
5 469
Part Number:
PI6C48535-01LEX
Manufacturer:
PERICOM
Quantity:
20 000
Pin Description
Notes:
1. I = Input, O = Output, P = Power supply connection, I_PD = Input with pull down, I_PU = Input with pull up.
Pin Characteristics
Control Input Function Table
Notes:
1. After CLK_EN switches, the clock outputs are disabled or enabled following a rising and falling input clock edge as show below.
V
CLK_EN
CLK_SEL
CLK
CLK
NC
V
Q
Q
Q
Q
EE
CC
3
2
1
0
R_pulldown
CLK_EN
,
,
,
,
Name
R_pullup
n
n
n
n
Symbol
0
1
Q
Q
Q
Q
C
0
0
1
1
11-0040
3
2
1
0
IN
5, 7, 8, 9
10, 13,
11, 12
14, 15
16, 17
19, 20
Pin #
18
1
2
3
4
6
Input Pulldown Resistance
CLK_SEL
Input Pullup Resistance
Input Capacitance
0
1
0
1
Parameter
Inputs
Type
I_PU
I_PD
I_PD
I_PD
O
O
O
O
P
P
Connect to Negative power supply
Synchronizing clock enable. When high, clock outputs follow clock input. When low, Qx
outputs are forced low, nQx outputs are forced high. LVCMOS/LVTTL level with 50KΩ
pull up.
Clock select input. When high, selects CLK
LVCMOS/LVTTL level with 50KΩ pull down.
LVCMOS / LVTTL clock input
LVCMOS / LVTTL clock input
No internal connection.
Connect to 3.3V.
Differential output pair, LVPECL interface level.
Differential output pair, LVPECL interface level.
Differential output pair, LVPECL interface level.
Differential output pair, LVPECL interface level.
Selected Source
CLK
CLK
CLK
CLK
0
1
0
1
Conditions
2
LVTTL/LVCMOS to LVPECL Fanout Buffer
Diasbled: Low
Disabled: Low
Description
Min.
Enabled
Enabled
Q
0
:Q
1
input. When low, selects CLK
3
Typ.
Outputs
50
50
3.3V Low Skew 1-to-4
Diasbled: High
Disabled: High
Max.
4
n
Enabled
Enabled
Q
PI6C48535-01
0
:
0
n
PS8735A
input.
Q
3
Units
KΩ
pF
03/25/11

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