SI5330B-A00204-GM Silicon Laboratories Inc, SI5330B-A00204-GM Datasheet - Page 11

• Manufacturer Part Number: SI5330B-A00204-GM
• Description: IC BUFFER LVDS DIFF 4OUT 24-QFN
• Manufacturer: Silicon Laboratories Inc
• Type: Fanout Buffer (Distribution), Translatorr

Specifications of SI5330B-A00204-GM

• Number Of Circuits: 1
• Ratio - Input:output: 1:4
• Differential - Input:output: Yes/Yes
• Input: CML, CMOS, HCSL, HSTL, LVDS, LVPECL, LVTTL, SSTL
• Output: LVDS
• Frequency - Max: 710MHz
• Voltage - Supply: 1.71 V ~ 3.63 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 24-QFN
• Frequency-max: 710MHz
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant
• Other names: 336-1550-5

Pin #
10
11
12
13
7
8
9
RSVD_GND
Pin Name
VDDO3
CLK3B
CLK3A
CLK2B
VDD
LOS
Table 9. Si5330 Pin Descriptions (Continued)
VDD
VDD
I/O
O
O
O
O
Signal Type
Open Drain
Supply
Supply
Multi
Multi
Multi
Rev. 0.35
Core Supply Voltage.
The device operates from a 1.8, 2.5, or 3.3 V supply. A
0.1 µF bypass capacitor should be located very close to
this pin.
Loss of Signal Indicator.
0 = CLKIN present.
1 = Loss of signal (LOS).
This pin requires an external 1 kpull-up resistor.
Si5330A/B/C/K/L/M Differential Output Devices.
This is the negative side of the differential CLK3 output.
Refer to AN408 for interfacing and termination details.
Leave unconnected when not in use.
Si5330F/G/H/J Single-Ended Output Devices.
This is one of the single-ended CLK3 outputs. Both
CLK3A and CLK3B single-ended outputs are in phase.
Refer to AN408 for interfacing and termination details.
Leave unconnected when not is use.
Si5330A/B/C/K/L/M Differential Devices.
This is the positive side of the differential CLK3 output.
Refer to AN408 for interfacing and termination details.
Leave unconnected when not in use.
Si5330F/G/H/J Single-Ended Devices.
This is one of the single-ended CLK3 outputs. Both
CLK3A and CLK3B single-ended outputs are in phase.
Refer to AN408 for interfacing and termination details.
Leave unconnected when not is use.
Output Clock Supply Voltage.
Supply voltage for CLK3A/B. Use a 0.1 µF bypass cap
as close as possible to this pin. If CLK3 is not used, this
pin must be tied to V
Ground.
Must be connected to system ground.
Si5330A/B/C/K/L/M Differential Output Devices.
This is the negative side of the differential CLK2 output.
Refer to AN408 for interfacing and termination details.
Leave unconnected when not in use.
Si5330F/G/H/J Single-Ended Output Devices.
This is one of the single-ended CLK2 outputs. Both
CLK2A and CLK2B single-ended outputs are in phase.
Refer to AN408 for interfacing and termination details.
Leave unconnected when not is use.
DD
Description
(pin 7 and/or pin 24).
Si5330
11