NB6L16DTG ON Semiconductor, NB6L16DTG Datasheet - Page 7

• Manufacturer Part Number: NB6L16DTG
• Description: IC RCVR DRVR XLATOR BUFF 8-TSSOP
• Manufacturer: ON Semiconductor
• Type: Buffer/Driver, Translatorr

Specifications of NB6L16DTG

• Number Of Circuits: 1
• Ratio - Input:output: 1:1
• Differential - Input:output: Yes/Yes
• Input: CML, LVCMOS, LVDS, LVNECL, LVPECL, LVTTL
• Output: ECL
• Frequency - Max: 6GHz
• Voltage - Supply: 2.375 V ~ 3.465 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 8-TSSOP
• Frequency-max: 6GHz
• Supply Voltage (max): 3.6 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• Supply Current: 12 mA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: NB6L16DTG; NB6L16DTGOS

NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit
24. Measured using a 800 mV source, 50% duty cycle clock source. All loading with 50 W to V
25. See Figure 9 t
26. Additive RMS jitter with 50% duty cycle clock signal at 6 GHz.
27. Additive Peak−to−Peak data dependent jitter with NRZ PRBS 2
28. V
Table 7. AC CHARACTERISTICS
V
f
t
t
t
t
V
t
t
Symbol
DATA
PLH
PHL
SKEW
JITTER
r
f
OUTPP
INPP
0.8
0.7
0.6
0.5
0.4
0.3
0.2
0.1
0.0
transitions and conditions @ 1 GHz.
operating in the differential mode.
INPP(max)
,
board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared
operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit
values are applied individually under normal operating conditions and not valid simultaneously.
Figure 2. Output Voltage Amplitude (V
versus Input Clock Frequency (f
Output Voltage Amplitude
(See Figures 2 & 3)
Maximum Operating Data Rate
Propagation Delay to
Output Differential @ 1 GHz
Duty Cycle Skew (Note 25)
Device−to−Device Skew
RMS Random Clock Jitter
(Note 26)
Peak−to−Peak Data Dependent JItter
(Note 27)
Input Voltage Swing / Sensitivity
(Differential Configuration) (Note 28)
Output Rise/Fall Times
(20% − 80%)
1
cannot exceed V
Temperature at V
skew
INPUT CLOCK FREQUENCY (GHz)
2
= |t
25°C
PLH
Characteristic
85°C
3
− t
CC
−40°C
PHL
− V
| for a nominal 50% differential clock input waveform. Skew is measured between outputs under identical
4
CC
EE
. (Applicable only when V
V
− V
f
CC
f
f
f
in
in
in
in
5
< 6 Gb/s
EE
< 3 GHz
< 6 GHz
< 6 GHz
= 0 V; V
= 3.3 V
Q, Q
6
IN
EE
) and
OUTPP
= −3.465 V to −2.375 V or V
Min
500
270
80
75
30
7
6
http://onsemi.com
)
−40°C
8
Typ
700
350
130
700
CC
0.2
30
70
23
3
2
−1 data rate at 6 Gb/s.
− V
7
EE
2500
Max
180
120
25
60
12
< 2500 mV). Input voltage swing is a single−ended measurement
0.8
0.7
0.6
0.5
0.4
0.3
0.2
0.1
0.0
1
Figure 3. Output Voltage Amplitude (V
Min
500
270
80
75
30
CC
versus Input Clock Frequency (f
1
= 2.375 V to 3.465 V; V
Temperature at V
INPUT CLOCK FREQUENCY (GHz)
25°C
Typ
700
350
130
700
0.2
30
70
3
2
CC
2
. Input edge rates 40 ps (20% − 80%).
2500
25°C
Max
180
120
25
60
12
3
1
85°C
−40°C
4
Min
500
270
CC
85
75
30
EE
− V
= 0 V (Note 24)
5
EE
85°C
Typ
700
300
135
700
0.2
30
70
3
2
= 2.5 V
6
IN
2500
) and
Max
185
120
25
60
12
OUTPP
1
7
Gb/s
Unit
mV
mV
)
ps
ps
ps
ps
8