MC100EP809FA ON Semiconductor, MC100EP809FA Datasheet - Page 3

• Manufacturer Part Number: MC100EP809FA
• Description: IC DRVR CLK PECL-HSTL 1:9 32LQFP
• Manufacturer: ON Semiconductor
• Series: 100EPr
• Type: Fanout Buffer (Distribution), Multiplexerr

Specifications of MC100EP809FA

• Number Of Circuits: 2
• Ratio - Input:output: 1:9
• Differential - Input:output: Yes/Yes
• Input: HSTL, LVDS, LVPECL
• Output: HSTL
• Frequency - Max: 750MHz
• Voltage - Supply: 3 V ~ 3.6 V
• Operating Temperature: 0°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 32-LQFP
• Frequency-max: 750MHz
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Other names: MC100EP809FAOS

* Pins will default LOW when left open.
** Pins will default HIGH when left open.
Table 1. PIN DESCRIPTION
HSTL_CLK*,
HSTL_CLK**
LVPECL_CLK*,
LVPECL_CLK**
CLK_SEL**
OE**
Q0 − Q8,
Q0 − Q8
V
V
GND
EP
CC1
CC0
PIN
GND
V
CCI
Table 3. ATTRIBUTES
1. For additional information, see Application Note AND8003/D.
HSTL or LVDS Differential Inputs
LVPECL or LVDS Differential Inputs
LVCMOS/LVTTL Input CLK Select
LVCMOS/LVTTL Output Enable
HSTL Differential Outputs
Positive Supply_Core
Positive Supply_HSTL Outputs
Ground
The exposed pad (EP) on the QFN−32
package bottom is thermally connected to
the die for improved heat transfer out of the
package. THe exposed pad must be at-
tached to a heat−sinking conduit. The pad
is electrically connected to GND.
Internal Input Pulldown Resistor
Internal Input Pullup Resistor
ESD Protection
Moisture Sensitivity, Indefinite Time Out of Drypack (Note 1)
Flammability Rating
Transistor Count
Meets or exceeds JEDEC Spec EIA/JESD78 IC Latchup Test
(3.0 V − 3.6 V)
(1.6 V − 2.0 V)
LVPECL_CLK
LVPECL_CLK
FUNCTION
HSTL_CLK
HSTL_CLK
CLK_SEL
Characteristics
Figure 3. Logic Diagram
OE
http://onsemi.com
Oxygen Index: 28 to 34
Charged Device Model
Human Body Model
Machine Model
3
0
1
*The OE (Output Enable) signal is synchronized with the rising edge
Table 2. TRUTH TABLE
LQFP−32
of the HSTL_CLK and LVOCL_CLK signals.
QFN−32
OE*
H
H
L
L
D
Q
CLK_SEL
Pb Pkg
Level 2
UL 94 V−0 @ 0.125 in
N/A
H
H
L
L
478 Devices
37.5 kW
> 200 V
9
9
> 2 kV
> 2 kV
Value
75 kW
LVPECL_CLK
Pb−Free Pkg
HSTL_CLK
Q0 − Q8
Q0−Q8 (HSTL)
Q0−Q8 (HSTL)
Level 2
Level 1
L
L
V
CCO
LVPECL_CLK
HSTL_CLK
Q0 − Q8
H
H