NB3L553DR2G ON Semiconductor, NB3L553DR2G Datasheet

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NB3L553DR2G

Manufacturer Part Number
NB3L553DR2G
Description
IC BUFFER 1:4 CLK 180MHZ 8-SOIC
Manufacturer
ON Semiconductor
Type
Fanout Buffer (Distribution)r
Datasheet

Specifications of NB3L553DR2G

Number Of Circuits
1
Ratio - Input:output
1:4
Differential - Input:output
No/No
Input
LVCMOS, LVTTL
Output
LVCMOS, LVTTL
Frequency - Max
200MHz
Voltage - Supply
2.38 V ~ 5.25 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
8-SOIC (3.9mm Width)
Frequency-max
200MHz
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
NB3L553DR2GOSCT-ND
Manufacturer:
ON
Quantity:
220
NB3L553
2.5 V / 3.3 V / 5.0 V
1:4 Clock Fanout Buffer
Description
clock distribution in mind. The NB3L553 specifically guarantees low
output−to−output skew. Optimal design, layout and processing
minimize skew within a device and from device to device.
Features
© Semiconductor Components Industries, LLC, 2010
June, 2010 − Rev. 7
The NB3L553 is a low skew 1−to 4 clock fanout buffer, designed for
Input/Output Clock Frequency up to 200 MHz
Low Skew Outputs (35 ps), Typical
RMS Phase Jitter (12 kHz – 20 MHz): 29 fs (Typical)
Output goes to Three−State Mode via OE
Operating Range: V
5 V Tolerant Input Clock I
Ideal for Networking Clocks
Packaged in 8−pin SOIC
Industrial Temperature Range
These are Pb−Free Devices
I
CLK
Figure 1. Block Diagram
DD
= 2.375 V to 5.25 V
OE
CLK
Q1
Q2
Q3
Q4
1
†For information on tape and reel specifications,
NB3L553DG
NB3L553DR2G
NB3L553MNR4G*
*Contact Sales Representative
including part orientation and tape sizes, please
refer to our Tape and Reel Packaging Specification
Brochure, BRD8011/D.
8
*For additional marking information, refer to
Device
1
Application Note AND8002/D.
(Note: Microdot may be in either location)
1
GND
ORDERING INFORMATION
3L553 = Specific Device Code
A
L
Y
W
G
V
6P = Specific Device Code
M
G
Q0
Q1
DD
PINOUT DIAGRAM
http://onsemi.com
= Date Code
CASE 506AA
1
2
3
4
MN SUFFIX
CASE 751
= Assembly Location
= Wafer Lot
= Year
= Work Week
= Pb−Free Package
D SUFFIX
= Pb−Free Package
SOIC−8
(Pb−Free)
(Pb−Free)
(Pb−Free)
Package
DFN8
SOIC−8
SOIC−8
DFN−8
MARKING DIAGRAMS*
Publication Order Number:
8
7
6
5
2500/Tape & Reel
1000/Tape & Reel
8
1
98 Units/Rail
OE
Q3
Q2
I
1
Shipping
CLK
3L553
ALYW
6P MG
NB3L553/D
G
G

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NB3L553DR2G Summary of contents

Page 1

... Q1 4 GND ORDERING INFORMATION Device Package NB3L553DG SOIC−8 (Pb−Free) NB3L553DR2G SOIC−8 (Pb−Free) NB3L553MNR4G* DFN−8 (Pb−Free) *Contact Sales Representative †For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specification Brochure, BRD8011/D ...

Page 2

Table 1. OE, OUTPUT ENABLE FUNCTION Table 2. PIN DESCRIPTION Pin # Name Type 1 V Power (LV)CMOS/(LV)TTL Output 3 Q1 (LV)CMOS/(LV)TTL Output 4 GND Power 5 I (LV)CMOS Input CLK 6 Q2 (LV)CMOS/(LV)TTL Output 7 Q3 ...

Page 3

Table 3. MAXIMUM RATINGS Symbol Parameter V Positive Power Supply DD V Input Voltage I T Operating Temperature Range, A Industrial T Storage Temperature Range stg Thermal Resistance q JA (Junction−to−Ambient) q Thermal Resistance (Junction−to−Case) JC Thermal Resistance q JA ...

Page 4

Table 5. DC CHARACTERISTICS (V DD Symbol I Power Supply Current @ 135 MHz, No Load DD V Output HIGH Voltage – Output LOW Voltage – Input HIGH Voltage, I IH, ...

Page 5

Table 6. AC CHARACTERISTICS; V Symbol f Input Frequency Output rise and fall times Propagation Delay, CLK Output−to−output skew; (Note 5) skew t Device−to−device skew, ...

Page 6

Figure 2. Phase Noise Plot at 100 MHz at an Operating Voltage of 3.3 V, Room Temperature The above plot captured using Agilent E5052A shows Additive Phase Noise of the NB3L553 device measured with an input source generated by Agilent ...

Page 7

... G C SEATING PLANE −Z− 0.25 (0.010 *For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. PACKAGE DIMENSIONS SOIC−8 NB CASE 751−07 ISSUE 0.10 (0.004 SOLDERING FOOTPRINT* 1 ...

Page 8

... Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner. PUBLICATION ORDERING INFORMATION LITERATURE FULFILLMENT: Literature Distribution Center for ON Semiconductor P.O. Box 5163, Denver, Colorado 80217 USA Phone: 303−675−2175 or 800−344−3860 Toll Free USA/Canada Fax: 303− ...

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