ADF4108BCPZ Analog Devices Inc, ADF4108BCPZ Datasheet - Page 4

IC PLL FREQUENCY SYNTH 20-LFCSP

ADF4108BCPZ

Manufacturer Part Number
ADF4108BCPZ
Description
IC PLL FREQUENCY SYNTH 20-LFCSP
Manufacturer
Analog Devices Inc
Type
Clock/Frequency Synthesizer (RF)r
Datasheet

Specifications of ADF4108BCPZ

Pll
Yes
Input
CMOS
Output
Clock
Number Of Circuits
1
Ratio - Input:output
2:1
Differential - Input:output
Yes/No
Frequency - Max
8GHz
Divider/multiplier
No/No
Voltage - Supply
3.2 V ~ 3.6 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
20-LFCSP
Frequency-max
8GHz
Pll Type
Frequency Synthesis
Frequency
8GHz
Supply Current
15mA
Supply Voltage Range
3.2V To 3.6V
Digital Ic Case Style
LFCSP
No. Of Pins
20
Operating Temperature Range
-40°C To +85°C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
EVAL-ADF4108EBZ1 - BOARD EVAL FOR ADF4108
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
ADF4108BCPZ
Manufacturer:
ADI/亚德诺
Quantity:
20 000
ADF4108
Parameter
NOISE CHARACTERISTICS
1
2
3
4
5
6
7
8
9
10
11
Operating temperature range (B version) is −40°C to +85°C.
The B chip specifications are given as typical values.
This is the maximum operating frequency of the CMOS counters. The prescaler value should be chosen to ensure that the RF input is divided down to a frequency that
is less than this value.
AV
AC coupling ensures AV
Guaranteed by design. Sample tested to ensure compliance.
T
T
This value can be used to calculate phase noise for any application. Use the formula −219 + 10 log(f
seen at the VCO output. The value given is the lowest noise mode.
synthesizer (f
The phase noise is measured with the EVAL-ADF4108EB1Z evaluation board, with the ZComm CRO8000Z VCO. The spectrum analyzer provides the REF
f
A
A
REFIN
Normalized Phase Noise Floor
Phase Noise Performance
Spurious Signals
= 25°C; AV
= 25°C; AV
DD
7900 MHz Output
7900 MHz Output
= DV
= 10 MHz; f
DD
= 3.3 V.
DD
DD
REFOUT
= DV
= DV
PFD
= 10 MHz @ 0 dBm).
= 1 MHz; f
DD
DD
= 3.3 V; P = 32; RF
= 3.3 V; R = 16,383; A = 63; B = 891; P = 32; RF
DD
/2 bias.
11
11
RF
= 7900 MHz; N = 7900; loop B/W = 30 kHz, VCO = ZComm CRO8000Z.
10
9
IN
= 8 GHz, f
B Version
−219
−81
−82
PFD
= 200 kHz, REF
1
B Chips
(Typ)
−219
−81
−82
IN
IN
= 7.0 GHz.
= 10 MHz.
Rev. A | Page 4 of 20
2
Unit
dBc/Hz typ
dBc/Hz typ
dBc typ
PFD
Test Conditions/Comments
@ VCO output
@ 1 kHz offset and 1 MHz PFD frequency
@ 1 MHz offset and 1 MHz PFD frequency
) + 20 logN to calculate in-band phase noise performance as
IN
for the

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