SI4114G-BM Silicon Laboratories Inc, SI4114G-BM Datasheet
SI4114G-BM
Specifications of SI4114G-BM
Available stocks
Related parts for SI4114G-BM
SI4114G-BM Summary of contents
Page 1
... Rev. 1.1 10/06 I VCO GPRS Class 12 compliant Low phase noise Programmable powerdown modes 1 µA standby current Package 28-lead QFN RF1 RFOUT RF2 ÷N RF Copyright © 2006 by Silicon Laboratories Si4114G Ordering Information: See page 21. Pin Assignments Si4114G- GND 1 GND GND 4 GND GND 7 GND ...
Page 2
Rev. 1.1 ...
Page 3
... Output Frequencies . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 3.4. PLL Loop Dynamics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 3.5. RF Outputs (RFOUT 3.6. Reference Frequency Amplifier . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 3.7. Powerdown Modes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 3.8. Auxiliary Output (AUXOUT Control Registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .17 5. Pin Descriptions: Si4114G- .20 6. Ordering Guide . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 7. Package Outline: Si4114G- .22 Document Change List . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .23 Contact Information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .24 Rev. 1.1 Si4114G Page 3 ...
Page 4
Electrical Specifications Table 1. Recommended Operating Conditions Parameter Ambient Temperature Supply Voltage Supply Voltages Difference Note: All minimum and maximum specifications are guaranteed and apply across the recommended operating conditions. Typical values apply ...
Page 5
... For signal AUXOUT. Symbol Test Condition RF1 active RF2 active PWDN = –500 µ 500 µ Rev. 1.1 Si4114G Min Typ Max Unit — — — 1 — µA 0.7 V — — — — 0 –10 — 10 µA –10 — 10 µA V –0.4 — — — ...
Page 6
Table 4. Serial Interface Timing (V = 2 – ° Parameter SCLK Cycle Time SCLK Rise Time SCLK Fall Time SCLK High Time SCLK ...
Page 7
... S CLK D17 t en1 Figure 2. Serial Interface Timing Diagram First bit c loc ked Figure 3. Serial Word Format t hold D16 D15 data field Rev. 1.1 Si4114G en3 t en2 t w Last bit c loc ked address field 7 ...
Page 8
Table 5. RF Synthesizer Characteristics (V = 2 – ° Parameter XIN Input Frequency Reference Amplifier Sensitivity Phase Detector Update Frequency RF1 Tuning Range ...
Page 9
... PWDN SEN SDATA PDRB = 1 Figure 4. Software Power Management Timing Diagram PWDN PWDN Figure 5. Hardware Power Management Timing Diagram RF synthesizers settled to within 0.1 ppm frequency error. t pup PDRB = 0 RF synthesizers settled to within 0.1 ppm frequency error. t pup Rev. 1.1 Si4114G t pdn t pdn 9 ...
Page 10
Figure 6. Typical Transient Response RF1 at 1.92 GHz with 200 kHz Phase Detector Update Frequency 10 Rev. 1.1 ...
Page 11
... Figure 7. Typical RF1 Phase Noise at 1.92 GHz with 200 kHz Phase Detector Update Frequency Figure 8. Typical RF1 Spurious Response at 1.92 GHz with 200 kHz Phase Detector Update Frequency 1.00E+04 1.00E+05 1.00E+06 Hz offset Rev. 1.1 Si4114G 1.00E+07 11 ...
Page 12
-50 -60 -70 -80 -90 -100 -110 -120 -130 -140 -150 1.00E+02 1.00E+03 Figure 9. Typical RF2 Phase Noise at 1.78 GHz with 200 kHz Phase Detector Update Frequency Figure 10. Typical RF2 Spurious ...
Page 13
... Typical Application Circuit From System Controller 1 GND 2 GND GND GND 7 GND V DD PWDNB GND 20 GND 19 GND 18 Si4114G-BM GND 17 VDDD 16 GND 15 XIN 0.022 µF Rev. 1.1 Si4114G V DD 0.022 µF 560 pF External Clock AUXOUT 560 pF <2 nH RFOUT 13 ...
Page 14
... Functional Description The Si4114G is a monolithic integrated circuit (IC) that performs multi-band RF synthesis for E-GSM 900, DCS 1800, and PCS 1900 applications. Its fast transient response also makes the Si4114G especially well suited to GPRS multislot applications where channel switching and settling times are critical. This IC, with a minimum number of external components, is all that is necessary to implement the frequency synthesis function ...
Page 15
... The network is made to provide an adequate match for both the RF1 and RF2 frequency bands, and also filters the output signal to reduce harmonic distortion Ω load is not required for proper operation of the Si4114G. Depending on transceiver requirements, the matching network might not be needed. See Figure 11. ...
Page 16
PWDN Pin PWDN = 0 PWDN = 1 16 Table 6. Powerdown Configuration PDRB Reference Frequency Amplifier x OFF 0 OFF 1 ON Rev. 1.1 RF Circuitry OFF OFF ON ...
Page 17
... Note: Registers 1 and 5–15 are reserved. Writes to these registers may result in unpredictable behavior. Any register not listed here is reserved and should not be written. Table 7. Register Summary Bit Bit Bit Bit Bit Bit Bit Bit AUXSEL [1: [17:0] RF1 N RF2 Rev. 1.1 Si4114G Bit Bit Bit Bit Bit Bit RDIV [16:0] Bit 0 0 PDRB 17 ...
Page 18
Register 0. Main Configuration Address Field = A[3:0] = 0000 Bit D17 D16 D15 D14 D13 D12 D11 D10 D9 Name AUXSEL Bit Name 17:14 Reserved 13:12 AUXSEL[1:0] 11:7 Reserved ...
Page 19
... RF2 Note Program to zero. Powerdown RF Synthesizer synthesizer powered down synthesizer on [17:0] RF1 Function can be any value from 9201–9500 (1840.2–1990 MHz). RF1 [16:0] RF2 Function can be any value from 8500–9200 (1710–1840 MHz). RF2 Rev. 1.1 Si4114G PDRB Function ...
Page 20
... Pin Descriptions: Si4114G-BM Pin Number(s) Name Description 6–9, 14, GND Common ground for RF analog and digital circuitry 16, 18–24 connect 10 RFOUT Radio frequency (RF) output of the selected RF VCO 11 VDDR Supply voltage for the RF analog circuitry 12 AUXOUT Auxiliary output 13 PWDN Powerdown input pin 15 XIN ...
Page 21
... Ordering Guide Ordering Part Number Si4114G-BM Si4114G-B-GM Description Dual RF Synthesizer Dual RF Synthesizer, Pb-free, QFN Rev. 1.1 Si4114G Operating Temperature – °C – °C 21 ...
Page 22
... Package Outline: Si4114G- D TOP VIEW Figure 12. 28-Pin Quad Flat No-lead Package (QFN E1/2 E θ SECTION "C–C" SCALE: NONE e Table 8. Package Dimensions Controlling Dimension: mm Symbol Millimeters Min Nom Max A — 0.85 0.90 A1 0.00 0.01 0.05 b 0.18 0.23 0. 5.00 BSC D1 ...
Page 23
... OCUMENT HANGE IST Revision 0.5 to Revision 1.0 Table 5 on page 8 Combined Notes and 3 and 4 Revision 1.0 to Revision 1.1 Updated "6. Ordering Guide" on page 21. Changed all package type references of MLP to QFN. Rev. 1.1 Si4114G 23 ...
Page 24
... Should Buyer purchase or use Silicon Laboratories products for any such unintended or unauthorized application, Buyer shall indemnify and hold Silicon Laboratories harmless against all claims and damages. Silicon Laboratories and Silicon Labs are trademarks of Silicon Laboratories Inc. Other products or brand names mentioned herein are trademarks or registered trademarks of their respective holders. ...