DS1085LZ-12+ Maxim Integrated Products, DS1085LZ-12+ Datasheet - Page 2

• Manufacturer Part Number: DS1085LZ-12+
• Description: IC ECONOSCILLATOR SYNTH 8-SOIC
• Manufacturer: Maxim Integrated Products
• Series: EconOscillator™r
• Type: Frequency Synthesizerr

Specifications of DS1085LZ-12+

• Pll: No
• Input: Clock
• Output: Clock
• Number Of Circuits: 1
• Ratio - Input:output: 1:2
• Differential - Input:output: No/No
• Frequency - Max: 66MHz
• Divider/multiplier: Yes/No
• Voltage - Supply: 3 V ~ 3.6 V
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: Surface Mount
• Package / Case: 8-SOIC (3.9mm Width)
• Frequency-max: 66MHz
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

DS1085L
External control inputs, CTRL1 and CTRL0, enable or disable the two oscillator outputs. Both outputs
feature a synchronous enable that ensures no output glitches when the output is enabled and a constant
time interval (for a given frequency setting) from an enable signal to the first output transition. These
inputs can also be configured to disable the master oscillator, putting the device into a low-power mode
for power-sensitive applications.
Figure 1. DS1085L BLOCK DIAGRAM
0M0
0M1
1M0
1M1
OVERVIEW
A block diagram of the DS1085L is shown in Figure 1. The DS1085L consists of five major components:
§ Internal master oscillator (33MHz to 66MHz)
§ Master oscillator control DAC
§ Prescalers (divide-by-1, 2, 4, or 8)
§ Programmable divider (divide-by-1 to 1025)
§ Control registers
The internal master oscillator provides the reference clock (MCLK), which is fed to the prescalers and
programmable dividers. The frequency of the oscillator can be user-programmed over a two-to-one range
in increments equal to the step size, by means of a 10-bit control DAC. The master oscillator range is
33MHz to 66MHz, which is larger than the range possible with the 10-bit DAC resolution and available
step sizes. Therefore, an additional register (OFFSET) is provided that can be used to select the range of
frequency over which the DAC is used (see Table 1).
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