MC145170D2 Freescale Semiconductor, MC145170D2 Datasheet - Page 15

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MC145170D2

Manufacturer Part Number
MC145170D2
Description
IC SERIAL PLL FREQ SYNTH 16-SOIC
Manufacturer
Freescale Semiconductor
Type
Clock/Frequency Synthesizer, Fanout Distributionr
Datasheet

Specifications of MC145170D2

Pll
Yes
Input
Clock
Output
Clock
Number Of Circuits
1
Ratio - Input:output
1:2
Differential - Input:output
No/No
Frequency - Max
185MHz
Divider/multiplier
Yes/No
Voltage - Supply
2.7 V ~ 5.5 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
16-SOIC (3.9mm Width)
Frequency-max
185MHz
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant

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MOTOROLA
C7 - POL:
C6 - PDA/B: Selects which phase/frequency detector is to be used. When set high, enables the
C5 - LDE:
C4 - C2, OSC2 - OSC0:
C1 - f
C0 - f
V
R
E:
E:
Figure 16. C Register Access and Format (8 Clock Cycles are Used)
ENB
CLK
D
* At this point, the new byte is transferred to the C register and stored. No other registers are affected.
in
Select the output polarity of the phase/frequency detectors. When set high, this
bit inverts PD
Figure 19. Also see the phase detector output pin descriptions for more
information. This bit is cleared low at power up.
output of phase/frequency detector A (PD
detector B by forcing
phase/frequency detector B is enabled (
A is disabled with PD
low at power up.
Enables the lock detector output when set high. When the bit is cleared low, the
LD output is forced to a static low level. This bit is cleared low at power up.
Reference output controls which determines the REF
below. Upon power up, the bits are initialized such that OSC
Enables the f
a static low level. The bit is cleared low upon power up.
Enables the f
a static low level. The bit is cleared low upon power up.
Freescale Semiconductor, Inc.
MSB
C7
For More Information On This Product,
1
C4
V
R
0
0
0
0
1
1
1
1
out
C6
output when set high. When cleared low, the f
output when set high. When cleared low, the f
and interchanges the
2
MC145170-2 Technical Data
Go to: www.freescale.com
C3
C5
0
0
1
1
0
0
1
1
out
R
3
forced to the high-impedance state. This bit is cleared
and
C4
C2
0
1
0
1
0
1
0
1
4
V
to the static high state. When cleared low,
C3
dc (Static Low)
OSC
OSC
OSC
OSC
Default)
OSC
OSC
OSC
REF
5
R
in
in
in
in
in
in
in
R
out
C2
function with
out
/2
/4
/8 (POR
/16
/8
/16
and
6
Frequency
) and disables phase/frequency
C1
V
) and phase/frequency detector
7
out
LSB
C0
characteristics as shown
8
V
as depicted in
V
R
in
output is forced to
output is forced to
/8 is selected.
*
Pin Connections
15

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