MPC9653AFAR2 Freescale Semiconductor, MPC9653AFAR2 Datasheet
MPC9653AFAR2
Specifications of MPC9653AFAR2
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MPC9653AFAR2 Summary of contents
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... LVCMOS signals while the outputs provide LVCMOS compatible levels with the capability to drive terminated 50 Ω transmission lines. For series terminated transmission lines, each of the MPC9653A outputs can drive one or two traces giving the devices an effective fanout of 1:16. The device is packaged in a 7x7 mm © Freescale Semiconductor, Inc., 2004. All rights reserved. MPC9653A LOW VOLTAGE 3 ...
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... BYPASS VCO_SEL Figure 2. MPC9653A 32-Lead Package Pinout (Top View) MPC9653A 2 ÷ Ref & 1 ÷ 2 VCO 1 PLL 200-500 MHz FB Note 1. PLL will lock @ 145 MHz Figure 1. MPC9653A Logic Diagram MPC9653A ÷ QFB GND MR/OE 9 PCLK 8 Advanced Clock Drivers Device Data Freescale Semiconductor ...
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... MR/OE 0 Outputs enabled (active) 1. PLL operation requires BYPASS = 1 and PLL_EN = 1. Advanced Clock Drivers Device Data Freescale Semiconductor PECL reference clock signal PLL feedback signal input, connect to QFB Operating frequency range select PLL and output divider bypass select PLL enable/disable Output enable/disable (high-impedance tristate) and device reset ...
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... V CC ±20 mA ±50 mA °C 125 Max Unit Condition V + 0.3 V LVCMOS CC 0.8 V LVCMOS mV LVPECL V – 0.6 V LVPECL – Ω ±200 µ Pin CC_PLL 10 mA All V Pins CC = -20 mA and V > Advanced Clock Drivers Device Data Freescale Semiconductor (2) or GND range CMR ...
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... Refer to the Application Information section for part-to-part skew calculation in PLL zero-delay mode. 12. For a specified temperature and voltage, includes output skew. 13. I/O phase jitter is reference frequency dependent. Refer to 14. –3 dB point of PLL transfer characteristics. Advanced Clock Drivers Device Data Freescale Semiconductor (1) = 0°C to 70°C) A Min (2) ÷ ...
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... REF ÷ – 50 MHz n/a ÷ – 25 MHz n 125 MHz REF VCO 25 to 62.5 MHz REF VCO and the filter capacitor C F Figure 3, the filter cut-off frequency is around Advanced Clock Drivers Device Data Freescale Semiconductor ⋅ 4 REF ⋅ 8 REF are F ...
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... With an output impedance of less than 20 Ω the drivers can drive either parallel or series terminated transmission lines. For more information on transmission lines the reader is referred to Freescale Semiconductor application note AN1091. In most high performance clock networks point-to-point distribution of signals is the method of choice point-to-point scheme either series terminated or parallel terminated transmission lines can be used ...
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... Figure 9. MPC9653A AC Test Reference OutA OutB t = 3.8956 3.9386 Time (ns) Figure 8, should be used. In this case the series MPC9653A Output Ω Ω Buffer S 14 Ω Ω Ω Ω Ω Ω Ω Ω 25 Ω Ω Ω Ω Advanced Clock Drivers Device Data Freescale Semiconductor 12 14 ...
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... Figure 12. Output Duty Cycle (DC) T JIT(CC N+1 The variation in cycle time of a signal between adjacent cycles, over a random sample of adjacent cycle pairs Figure 14. Cycle-to-Cycle Jitter Advanced Clock Drivers Device Data Freescale Semiconductor V CC ÷ PCLK GND V CC PCLK ÷ 2 ...
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... A2 1.35 1.45 b 0.30 0.45 b1 0.30 0.40 c 0.09 0.20 c1 0.09 0.16 D 9.00 BSC D1 7.00 BSC e 0.80 BSC E 9.00 BSC E1 7.00 BSC L 0.50 0.70 L1 1.00 REF q 0˚ 7˚ REF R1 0.08 0.20 R2 0.08 --- S 0.20 REF Advanced Clock Drivers Device Data Freescale Semiconductor ...
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... Advanced Clock Drivers Device Data Freescale Semiconductor NOTES MPC9653A 11 ...
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... Freescale Semiconductor product could create a situation where personal injury or death may occur. Should Buyer ...