mpc961p Integrated Device Technology, mpc961p Datasheet
mpc961p
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mpc961p Summary of contents
Page 1
... LQFP package to provide the optimum combination of board density and performance. PCLK PCLK FB_IN F_RANGE OE The MPC961P requires an external RC filter for the analog power supply pin V 492 IDT™ Low Voltage Zero Delay Buffer Freescale Timing Solutions Organization has been acquired by Integrated Device Technology, Inc V CC ...
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... Clock outputs LVCMOS PLL feedback signal output, connect to a FB_IN Ground Negative power supply V PLL positive power supply (analog power supply). The MPC961P requires an CC external RC filter for the analog power supply pin V section for details. V Positive power supply for I/O and core ...
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... CMR PP 2. The MPC961P is capable of driving 50 Ω transmission lines on the incident edge. Each output drives one 50 Ω parallel terminated transmission . Alternatively, the device drives up two 50 Ω series terminated transmission lines. line to a termination voltage Table 5. AC Characteristics (V ...
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... Exceeding the specified V /V CMR PP 2. The MPC961P is capable of driving 50 Ω transmission lines on the incident edge. Each output drives one 50 Ω parallel terminated transmission . Alternatively, the device drives up two 50 Ω series terminated transmission lines. line to a termination voltage Table 7. AC Characteristics (V ...
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... V DC current and thus only a single terminated line can be driven by each output of the MPC961P clock driver. For the series terminated case however there current draw, thus the outputs can drive multiple series terminated lines. ...
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... Calculation of Part-to-Part Skew The MPC961P zero delay buffer supports applications where critical clock signal timing can be maintained across several devices. If the reference clock inputs of two or more MPC961P are connected together, the maximum overall timing uncertainty from the common PCLK input to any output is: ...
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... Power Consumption of the MPC961P and Thermal Management The MPC961P AC specification is guaranteed for the entire operating frequency range up to 200 MHz. The MPC961P power consumption and the associated long-term reliability may decrease the maximum frequency limit, depending on operating conditions such as clock frequency, supply voltage, output loading, ambient temperature, vertical convection and thermal conductivity of package and board ...
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... According to Table 9.Die Junction Temperature and junction temperature can be used to estimate the long-term device reliability. Further, combining equation 1 and equation 2 results in a maximum operating frequency for the MPC961P in a series terminated transmission line system. Table 10. Thermal Package Impedance of the 32ld LQFP R ...
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... FREESCALE SEMICONDUCTOR ADVANCED CLOCK DRIVERS DEVICE DATA 3 2.4 0. Figure 13. Output Transition Time Test Reference t SK(O) Figure 15. Output-to-Output Skew t SK( –1/f JIT(PER Figure 17. Period Jitter NETCOM 1 ÷ GND V CC ÷ GND | 0 MPC961P ...
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... MPC961P PART NUMBERS Low Voltage Zero Delay Buffer INSERT PRODUCT NAME AND DOCUMENT TITLE Innovate with IDT and accelerate your future networks. Contact: www.IDT.com For Sales 800-345-7015 408-284-8200 Fax: 408-284-2775 Corporate Headquarters Integrated Device Technology, Inc. 6024 Silver Creek Valley Road ...