mpc961p Integrated Device Technology, mpc961p Datasheet - Page 7

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mpc961p

Manufacturer Part Number
mpc961p
Description
Lvpecl-input Lvcmos-ouput 200-mhz Low Voltage Clock Zero Delay Buffer
Manufacturer
Integrated Device Technology
Datasheet

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IDT™ Low Voltage Zero Delay Buffer
Freescale Timing Solutions Organization has been acquired by Integrated Device Technology, Inc
MPC961P
Low Voltage Zero Delay Buffer
MPC961P
Table 8. Confidence Factor CF
and can be used to fine-tune the effective delay through each
device. In the following example calculation a I/O jitter
confidence factor of 99.7% (± 3σ) is assumed, resulting in a
worst case timing uncertainty from input to any output of
–236 ps to 361 ps relative to PCLK (f=125 MHz, V
“Max. I/O Jitter versus frequency” can be used for a more
precise timing performance analysis.
Power Consumption of the MPC961P
and Thermal Management
operating frequency range up to 200 MHz. The MPC961P
power consumption and the associated long-term reliability
may decrease the maximum frequency limit, depending on
operating conditions such as clock frequency, supply voltage,
output loading, ambient temperature, vertical convection and
thermal conductivity of package and board. This section
498
P
P
T
f
CLOCK,MAX
TOT
TOT
J
The feedback trace delay is determined by the board layout
Due to the frequency dependence of the I/O jitter,
The MPC961P AC specification is guaranteed for the entire
t
t
= T
± 1σ
± 2σ
± 3σ
± 4σ
± 5σ
± 6σ
CF
SK(PP)
SK(PP)
=
= V
A
[
Figure 8. Max. I/O Jitter versus Frequency
+ P
18
16
14
12
10
I
CC
8
6
4
2
0
CCQ
= [-50 ps...175ps] + [-150 ps...150 ps] +
= [-236ps...361ps] + t
50
TOT
=
V
·
[(12ps @ -3)...(12ps @ 3)] + t
F_RANGE = 1
Probability of clock edge within the distribution
CC
[
C
+ V
I
= 3.3 V
· R
70
CCQ
PD
V
CC
CC
thja
· N · V
= 2.5 V
+ V
1
· f
90
CLOCK
CC
2
110
CC
· f
CLOCK
·
·
0.68268948
0.95449988
0.99730007
0.99993663
0.99999943
0.99999999
(
[
130
PD, LINE(FB)
V
N · C
F_RANGE = 0
CC
T
= 2.5 V
·
j,MAX
V
Clock frequency [MHz]
CC
150
(
PD
R
= 3.3 V
N · C
thja
+
– T
PD, LINE(FB)
170
M
Σ
PD
A
C
L
+
– (I
190
M
)
Σ
CC
]
CCQ
C
· V
=2.5 V):
Figure 8
L
CC
)
· V
]
FREESCALE SEMICONDUCTOR ADVANCED CLOCK DRIVERS DEVICE DATA
+
CC
P
Σ
)
[
]
DC
7
Q
describes the impact of these parameters on the junction
temperature and gives a guideline to estimate the MPC961P
die junction temperature and the associated device reliability.
For a complete analysis of power consumption as a function of
operating conditions and associated long term device reliability
refer to the Application Note AN1545. According the AN1545,
the long-term device reliability is a function of the die junction
temperature:
Table 9. Die Junction Temperature and MTBF
temperature and impact the device reliability (MTBF).
According to the system-defined tolerable MTBF, the die
junction temperature of the MPC961P needs to be controlled
and the thermal impedance of the board/package should be
optimized. The power dissipated in the MPC961P is
represented in equation 1.
MPC961P, C
(Μ)Σ
number of active outputs (N is always 27 in case of the
MPC961P). The MPC961P supports driving transmission lines
to maintain high signal integrity and tight timing parameters.
Any transmission line will hide the lumped capacitive load at the
end of the board trace, therefore,
transmission line systems and can be eliminated from
equation 1. Using parallel termination output termination results
in equation 2 for power dissipation.
parallel or thevenin termination, V
function of the output termination technique and DC
clock signal duty cycle. If transmission lines are used
zero in equation 2 and can be eliminated. In general, the use of
controlled transmission line techniques eliminates the impact of
the lumped capacitive loads at the end lines and greatly
reduces the power dissipation of the device. Equation 3
describes the die junction temperature T
power consumption.
· I
OH
Increased power consumption will increase the die junction
Where I
In equation 2, P stands for the number of outputs with a
Junction temperature (°C)
C
· (V
L
represents the external capacitive output load, N is the
CC
CCQ
– V
PD
is the static current consumption of the
is the power dissipation capacitance per output,
100
110
120
130
OH
) + (1 – DC
Q
) · I
Σ
OL
OL
C
, I
L
· V
OL
is zero for controlled
OL
, V
J
MTBF (Years)
as a function of the
OH
]
, and I
20.4
9.1
4.2
2.0
Equation 1
Equation 2
Equation 3
Equation 4
Q
OH
Σ
is the
NETCOM
C
are a
L
is
MPC961P

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