PI6C410MAE Pericom Semiconductor, PI6C410MAE Datasheet

PI6C410MAE

Manufacturer Part Number

PI6C410MAE

Description

IC CLK GEN INTEL PCI-EX 56-TSSOP

Manufacturer

Pericom Semiconductor

Type

Clock Generatorr

Datasheet

1.PI6C410MAE.pdf (21 pages)

Specifications of PI6C410MAE

Input

Differential

Output

Differential

Frequency - Max

400MHz

Voltage - Supply

3.135 V ~ 3.465 V

Operating Temperature

0°C ~ 70°C

Mounting Type

Surface Mount

Package / Case

56-TSSOP

Frequency-max

400MHz

Lead Free Status / RoHS Status

Lead free / RoHS Compliant

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Features

• 14.318 MHz Crystal Input

• Selectable of 100, 133, 166, 200, 266, 333, and 400 MHz

• SMBus: Power Management Control

• Spread Spectrum support (-0.5% down spread)

• Packaging (Pb-free & Green available):

Output Features

• Two Pairs of Differential CPU Clocks

• One selectable of CPU/SRC Clock

• Seven Pairs of SRC Clocks

• Six PCI Clocks

• One 48 MHz USB clock

• One REF clock

• One 96 MHz Differential clock

Block Diagram

FS_B / TEST_MODE

FS_C / TEST_SEL

CPU Output Frequencies

— 56-Pin TSSOP

PCIF_0 / ITP_EN

VTT_PWRGD#

XTAL_OUT

USB_48 / FS_A

CPU_STOP#

/ PWRDWN

PCI_STOP#

XTAL_IN

08-0298

SDA

SCL

SMBus

Logic

XTAL

OSC

PLL 1

PLL 2

Div

Clock Generator for Intel PCI Express Mobile Chipset

REF

DOT_96

DOT 96#

USB_48 / FS_A

PCIF[0:1]

CPU[0:1]

PCI [2:5]

CPU[0:1]#

SRC [0:6]

SRC [0:6]#

CPU2_ITP / SRC7

CPU2_ITP# / SRC7#

Description

PI6C410M is a high-speed, low-noise clock generator designed

to work with the Intel Mobile PCI Express Chipset. This Spread

Spectrum PLL based clock generator reduces EMI emission and

supports a wide range of frequencies.

Jitter Performance

• < 85ps Cycle-to-Cycle CPU 0/1 clock jitter

• < 125ps Cycle-to-Cycle CPU 2 clock jitter

• < 350ps Cycle-to-Cycle 48 MHz clock jitter

• < 500ps Cycle-to-Cycle PCI clock jitter

• < 125ps Cycle-to-Cycle SRC clock jitter

• < 1000ps Cycle-to-Cycle REF clock jitter

Skew Performance

• < 100ps Output-to-output CPU 0/1 clock skew

• < 250ps Output-to-output CPU 2 clock skew

• < 500ps Output-to-output PCI clock skew

• < 250ps Output-to-output SRC clock skew

Pin Conﬁ guration

VTT_PWRGD# / PWRDWN

FS_B / TEST_MODE

PCIF_0 / ITP_EN

USB_48/FS_A

VDD_SRC

VDD_PCI

DOT_96#

VSS_PCI

VDD_48

DOT_96

SRC_0#

SRC_1#

SRC_2#

SRC_3#

SRC_4#

VSS_48

PCIF_1

SRC_0

SRC_1

SRC_2

SRC_3

SRC_4

PCI_3

PCI_4

PCI_5

PI6C410M/410MA

PS8736F

PCI_2

PCI_STOP#

CPU_STOP#

FS_C / TEST_SEL

REF

VSS_REF

XTAL_IN

XTAL_OUT

VDD_REF

SDA

SCL

VSS_CPU

CPU_0

CPU_0#

VDD_CPU

CPU_1

CPU_1#

IREF

VSS_A

VDD_A

CPU2_ITP / SRC7

CPU2_ITP# / SRC7#

VDD_SRC

SRC_6

SRC_6#

SRC_5

SRC_5#

VSS_SRC

11/12/08

Related parts for PI6C410MAE

PI6C410MAE Summary of contents

Page 1

Features • 14.318 MHz Crystal Input • Selectable of 100, 133, 166, 200, 266, 333, and 400 MHz CPU Output Frequencies • SMBus: Power Management Control • Spread Spectrum support (-0.5% down spread) • Packaging (Pb-free & Green available): — ...

Page 2

Pin Description Pin Name Type REF Output XTAL_IN Input XTAL_OUT Output CPU[0:1] & CPU[0:1]# Output SRC[0:6] & SRC[0:6]# Output CPU2_ITP / SRC_7 & Output CPU2_ITP# / SRC_7# Input / PCIF_0 / ITP_EN Output PCIF_1 Output PCI[2:5] Output Input / USB_48 ...

Page 3

Functionality (1) Frequency Selection FS_C FS_B FS_A 100 MHz 133 MHz 166 MHz 200 MHz 266 MHz 333 MHz ...

Page 4

Serial Data Interface (SMBus) PI6C410M is a slave only SMBus device that supports indexed block read and indexed block write protocol using a single 7-bit ad- dress and read/write bit as shown below. Address Assignment (1) ...

Page 5

Data Byte 1: Control Register Bit Descriptions Spread Spectrum Enable Disable CPU_0 output enable Enabled Disabled (Hi-Z) CPU_1 output enable Enabled Disabled (Hi-Z) 3 Reserved ...

Page 6

Data Byte 3: Control Register Bit Descriptions SRC_0 Output Control Free Running Stopped with PCI_STOP# SRC_1 Output Control Free Running Stopped with PCI_STOP# SRC_2 Output Control Free ...

Page 7

Data Byte 4: Control Register Bit Descriptions CPU_0 Output Control Free Running Stopped with CPU_STOP# CPU_1 Output Control Free Running Stopped with CPU_STOP# CPU_2 Output Control Free ...

Page 8

Data Byte 6: Control Register Bit Descriptions FS_A Reﬂ ects the value of the FS_A pin sampled on power FS_A was low during Vtt_Pwrgd# assertion FS_B Reﬂ ects the value of the FS_B pin sampled on ...

Page 9

Vtt_Pwrgd# Timing Diagram Vcc to VRM 5/12V Vtt FS_A, FS_B, FS_C Vtt_Pwrgd from VRM Vtt_Pwrgd# Vcc Core PwrGood Vcc Clock Gen Clock State Clock Outputs Clock VCO Vcc to VRM 5/12V Vtt FS_A, FS_B, FS_C Vtt_Pwrgd from VRM Vtt_Pwrgd# Vcc ...

Page 10

Clock Power-Up State Machine Vdda = 2.0V Power Off Power Down (PWRDWN assertion) PWRDWN CPU, 133MHz CPU#, 133MHz SRC, 100MHz SRC#, 100MHz USB, 48MHz DOT, 96MHz DOT#, 96MHz PCI, 33MHz REF 08-0298 S1 Vtt_Pwrgd# = Low Delay >0.25ms S0 Vdda ...

Page 11

Power Down (PWRDWN De-assertion) PWRDWN CPU, 133MHz CPU#, 133MHz SRC, 100MHz SRC#, 100MHz USB, 48MHz DOT, 96MHz DOT#, 96MHz PCI, 33MHz REF CPU STOP (CPU_STOP# assertation) CPU_Stop# CPU CPU# 08-0298 Tstable <1.8ms Tdrive_PwrDwn <300us, >200mV Figure 5. Power down de-assetion ...

Page 12

CPU STOP (CPU_STOP# De-assertion) CPU_Stop# CPU CPU# CPU Internal CPU# Internal PCI STOP (PCI_STOP# assertion) PCI_Stop# PCIF[0:1], 33MHz PCI[2:5], 33MHz SRC, 100MHz SRC#, 100MHz PCI STOP (PCI_STOP# De-assertion) PCI_Stop# PCIF[0:1], 33MHz PCI[2:5], 33MHz SRC#, 100MHz SRC, 100MHz 08-0298 Tdrive_CPU_Stop#, 10ns ...

Page 13

Tristate Speciﬁ cations CPU Tristate clock truth table Pwrdwn CPU_STOP# Signal pin pin CPU[0: SRC Tristate clock truth table Pwrdwn PCI_STOP# Signal pin SRC[0: DOT Tristate clock truth ...

Page 14

CPU_Stop# PWRDWN CPU (Free Running) CPU# (Free Running) CPU (Stoppable) CPU# (Stoppable) Figure 11. CPU_Stop = Tristate, CPU_PWRDWN = Driven CPU_Stop# PWRDWN CPU (Free Running) CPU# (Free Running) CPU (Stoppable) PU# (Stoppable) Figure 12. CPU_Stop = Driven, CPU_PWRDWN = Tristate ...

Page 15

PCI_Stop# PCI (Free Running) PWRDWN CPU (Free Running) CPU# (Free Running) SRC (Stoppable) SRC# (Stoppable) Figure 14. SRC_Stop = Driven, SRC_PWRDWN = Driven PCI_Stop# PCI (Free Running) PWRDWN CPU (Free Running) CPU# (Free Running SRC (Stoppable) SRC# (Stoppable) Figure 15. ...

Page 16

Spread Spectrum Speciﬁ cations PI6C410M supports Spread Spectrum clocking and can be enabled and disabled via SMBus control. The maximum Spread Spec- trum Modulation is –0.5% down spread with frequency from 30KHz to 33KHz. SSC ON CPU @ 399.000 MHz ...

Page 17

Cueernt Accuracy Conditions Rref = 475Ω 3.30 ±5% OUT DD Iref = 2.32mA Host Clock Output Current Board Target Trace/Term Z 100Ω (100Ω differential ≈ 8% coupling ratio) (1) Crystal Recommendations Frequency Cut Loading 14.31818 MHz AT ...

Page 18

DC Electrical Characteristics Symbol Parameters VDD_A 3.3V Core Supply Voltage VDD 3.3V I/O Supply Voltage V 3.3V Input High Voltage IH V 3.3V Input Low Voltage IL I Input Leakage Current IK V _FS 3.3V Input High Voltage IH V ...

Page 19

AC Electrical Characteristics (V Symbol Outputs CPU, SRC, DOT rise fall PCI/PCIF, REF rise fall USB rise fall ΔT / ΔT CPU, SRC, DOT rise fall T CPU0, CPU1 skew T ...

Page 20

Conﬁ guration Test Load Board Termination PI6C410M 33Ω Note: 1. Maximum 10" trace length for CPU @ 200 MHz, 16" trace for SRC @ 100 MHz. 08-0298 Rs = 33Ω TLA Rs = 33Ω TLB Rp = 50Ω ...

Page 21

... Notes: 1. Thermal characteristics can be found on the company web site at www.pericom.com/packaging Pb-free and Green 3. X Sufﬁ Tape/Reel Pericom Semiconductor Corporation • 1-800-435-2336 • www.pericom.com 08-0298 Package Description A Pb-free & Green 56-Pin, 240mil wide, 0.5mm pitch TSSOP , Tape and Reel 21 PI6C410M/410MA Clock Generator for Intel ...

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