LTC6909IMS#PBF Linear Technology, LTC6909IMS#PBF Datasheet - Page 6

• Manufacturer Part Number: LTC6909IMS#PBF
• Description: IC OSCILLATOR W/SS MOD 16-MSOP
• Manufacturer: Linear Technology
• Type: Oscillator, Siliconr

Specifications of LTC6909IMS#PBF

• Frequency: 6.67MHz
• Voltage - Supply: 2.7 V ~ 5.5 V
• Current - Supply: 2.4mA
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 16-MSOP
• Clock External Input: No
• Supply Voltage Range: 2.7V To 5.5V
• Digital Ic Case Style: MSOP
• No. Of Pins: 16
• Operating Temperature Range: -40°C To +85°C
• Msl: MSL 1 - Unlimited
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Count: -

LTC6909
pin Functions
V
This supply should be kept free of noise and ripple. It
should be bypassed directly to GND with a 0.1µF or greater
low ESR capacitor. V
same supply voltage.
GND (Pin 2): Ground Connections. Should be tied to a
ground plane for best performance.
PH0, PH1, PH2 (Pins 3, 4, 15): Output Phasing Selec-
tion Pins. These are standard CMOS logic input pins and
they do not have an internal pull-up or pull-down. These
pins must be connected to a valid logic input 0 or 1 volt-
age. Connect the pins to GND for a logic 0 and to the V
pin for a logic 1. These pins configure the output phase
relationships as follows:
The PH0, PH1, PH2 pin connections not only determine
the phase relationship of the output signals but also divide
the master oscillator frequency by the value PH.
OUT1 Through OUT8 (Pins 5 Through 12): Oscillator
Outputs. These are CMOS rail-to-rail logic outputs with
a series resistance of approximately 40Ω, capable of
driving 1k and/or 50pF loads. Larger loads may cause
minor frequency inaccuracies due to supply bounce at
high frequencies. When any output pin is not in use, it is
in a floating, high impedance state. The outputs are also
held in a high impedance state during start-up. After the
6
+
A (Pin 1): Analog Voltage Supply (2.7V ≤ V
PH2
0
0
1
1
1
1
0
0
PH1
0
0
1
1
0
0
1
1
PH0
0
1
0
1
0
1
0
1
+
A and V
MODE
All Outputs Are Floating (Hi-Z)
All Outputs Are Held Low
3-Phase Mode (PH = 3)
4-Phase Mode (PH = 4)
5-Phase Mode (PH = 5)
6-Phase Mode (PH = 6)
7-Phase Mode (PH = 7)
8-Phase Mode (PH = 8)
+
D must be connected to the
+
A ≤ 5.5V).
+
D
part’s internal frequency setting loop has settled, the out-
puts are active, clean and operating at the set frequency
(first cycle accurate).
V
This pin should be bypassed directly to GND with a 0.1µF
or greater low ESR capacitor. V
nected to the same supply voltage.
MOD (Pin 14): Spread Spectrum Frequency Modulation
Setting Input. This input selects among four modulation
rate settings. The MOD pin should be tied to ground for
an f
an f
to V
active outputs to the MOD pin turns the modulation off.
To detect a floating MOD pin, the LTC6909 attempts to
pull the pin to the midsupply point. This is realized with
two internal current sources, one tied to V
and the other one tied to GND and MOD. Therefore, driv-
ing the MOD pin high requires sourcing approximately
2µA. Likewise, driving the MOD pin low requires sinking
approximately 2µA. When the MOD pin is floated for the
f
1nF or larger, capacitor to GND. Any AC signal coupling
to the MOD pin could potentially be detected and stop the
frequency modulation.
SET (Pin 16): Frequency Setting Resistor Input. The value
of the resistor connected between this pin and V
mines the frequency of the master oscillator. The output
frequency, f
by PH as set by the PH0, PH1 and PH2 pin connections.
The voltage on this pin is held approximately 1.1V below
V
resistor with a value between 20k and 400k, and limit the
capacitance on the pin to less than 10pF . Resistor values
outside of this range will have some loss of accuracy as
noted in the Electrical Characteristics table.
OUT
+
+
D (Pin 13): Digital Voltage Supply (2.7V ≤ V
A. For best performance, use a precision metal film
OUT
OUT
+
/32 modulation rate, it must be bypassed using a
D for the f
/16 modulation rate. Floating the MOD pin selects
/32 modulation rate. The MOD pin should be tied
OUT
, is the master oscillator frequency divided
OUT
/64 modulation rate. Tying one of the
+
D and V
+
A must be con-
+
D and MOD
+
D ≤ 5.5V).
+
A deter-
6909fa