LTC6991HS6#TRMPBF Linear Technology, LTC6991HS6#TRMPBF Datasheet - Page 17
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LTC6991HS6#TRMPBF
Manufacturer Part Number
LTC6991HS6#TRMPBF
Description
IC TIMERBLOX OSCILLATOR TSOT23-6
Manufacturer
Linear Technology
Datasheet
1.LTC6991CDCBTRMPBF.pdf
(24 pages)
Specifications of LTC6991HS6#TRMPBF
Frequency
*
Voltage - Supply
*
Current - Supply
135µA
Operating Temperature
*
Package / Case
TSOT-23-6, TSOT-6
Count
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
LTC6991HS6#TRMPBFTR
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
applicaTions inForMaTion
The oscillator can still function with reduced accuracy
for I
output will be frozen in its current state. The output could
halt in a high or low state. This avoids introducing short
pulses when frequency modulating a very low frequency
output.
At the other extreme, it is not recommended to operate
the master oscillator beyond 2MHz because the accuracy
of the DIV pin ADC will suffer.
Frequency Modulation and Settling Time
The LTC6991 will respond to changes in I
bandwidth of 0.4 • f
Following a 2× or 0.5× step change in I
frequency takes less than one cycle to settle to within 1%
of the final value.
Power Supply Current
The power supply current varies with frequency, supply
voltage and output loading. It can be estimated under
any condition using the following equation. This equation
SET
< 1.25µA. At approximately 500nA, the oscillator
OUT
.
µP
D
CLK
CS/LD
IN
0.1µF
V
LTC1659
V
CC
+
SET
Figure 15. Digitally-Controlled Oscillator
SET
GND
REF
up to a –3dB
, the output
V
OUT
0.1µF
LTC6078
V
+
1/2
R
VCO
+
–
ignores C
output has 50% duty cycle.
Supply Bypassing and PCB Layout Guidelines
The LTC6991 is a 2.2% accurate silicon oscillator when
used in the appropriate manner. The part is simple to use
and by following a few rules, the expected performance
is easily achieved. Adequate supply bypassing and proper
PCB layout are important to ensure this.
Figure 18 shows example PCB layouts for both the TSOT-23
and DFN packages using 0603 sized passive components.
The layouts assume a two layer board with a ground plane
layer beneath and around the LTC6991. These layouts are
a guide and need not be followed exactly.
I
R
S TYP
SET
(
D
f
OUT
IN
RST
GND
SET
= 0 TO 4095
=
)
LTC6991
1024 • N
LOAD
≈
1MHz • 50k
+
V
+
1 8
OUT
DIV
DIV
(valid for C
. •
V
•
+
f
• R
MASTER
I I
VCO
SET
• 1 +
+ 50
C1
0.1µF
• .
R
R
LOAD
7 8
VCO
SET
µA
V
+
–
pF
R1
R2
6991 F15
4096
D
< 1nF) and assumes the
IN
+
420
V
+
k
LTC6991
Ω
+
2
•
R
V
LOAD
+
6991f