LTC6991HS6#TRMPBF Linear Technology, LTC6991HS6#TRMPBF Datasheet - Page 9
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LTC6991HS6#TRMPBF
Manufacturer Part Number
LTC6991HS6#TRMPBF
Description
IC TIMERBLOX OSCILLATOR TSOT23-6
Manufacturer
Linear Technology
Datasheet
1.LTC6991CDCBTRMPBF.pdf
(24 pages)
Specifications of LTC6991HS6#TRMPBF
Frequency
*
Voltage - Supply
*
Current - Supply
135µA
Operating Temperature
*
Package / Case
TSOT-23-6, TSOT-6
Count
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
LTC6991HS6#TRMPBFTR
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
operaTion
The LTC6991 is built around a master oscillator with a
1MHz maximum frequency. The oscillator is controlled
by the SET pin current (I
1MHz • 50k conversion factor that is accurate to ±0.8%
under typical conditions.
A feedback loop maintains V
as the primary means of controlling the output frequency.
The simplest way to generate I
(R
The master oscillator equation reduces to:
From this equation, it is clear that V
the output frequency when using a single program resistor
(R
inherent frequency accuracy ∆f
R
between 1.25µA and 20µA).
Before reaching the OUT pin, the oscillator frequency
passes through a fixed ÷1024 divider. The LTC6991 also
includes a programmable frequency divider which can
further divide the frequency by 1, 8, 64, 512, 4096, 2
2
attached to the DIV pin.
with R
18
SET
SET
SET
f
f
f
t
t
MASTER
MASTER
or 2
OUT
OUT
OUT
) between SET and GND, such that I
). Error sources are limited to R
may range from 50k to 800k (equivalent to I
SET
21
=
=
=
. The divider ratio N
1
in place of V
N
f
1024
MHz
OUT
=
=
DIV
1
50
t
t
MASTER
MASTER
=
•
k
•
•
R
Ω
50
1
1
N
50
N N
SET
DIV
DIV
k
k
Ω
Ω
• .
SET
=
=
•
1 024
•
1
1
V
SET
I
V
MHz
I
MHz
/I
SET
SET
SET
SET
SET
SET
DIV
) and voltage (V
R
ms
SET
,
SET
•
•
• .
the equation reduces to:
OUT
at 1V ±30mV, leaving I
is set by a resistor divider
or
50
50
1 024
is to connect a resistor
k
k
SET
of the LTC6991.
Ω
Ω
SET
•
ms
drift will not affect
tolerance and the
V
I
SET
SET
SET
= V
SET
SET
), with a
/R
SET
SET
SET
15
.
,
DIVCODE
The DIV pin connects to an internal, V
converter that determines the DIVCODE value. DIVCODE
programs two settings on the LTC6991:
1. DIVCODE determines the output frequency divider set-
2. DIVCODE determines the polarity of the RST and OUT
V
and GND as shown in Figure 1.
Table 1 offers recommended 1% resistor values that ac-
curately produce the correct voltage division as well as the
corresponding N
resistor pairs. Other values may be used as long as:
1. The V
2. The driving impedance (R1||R2) does not exceed
If the voltage is generated by other means (i.e., the output
of a DAC) it must track the V
column in Table 1 shows the ideal ratio of V
supply voltage, which can also be calculated as:
For example, if the supply is 3.3V and the desired DIVCODE
is 4, V
Figure 2 illustrates the information in Table 1, showing that
N
DIV
DIV
ting, N
pins, via the POL bit.
tor tolerances and temperature effects)
500kΩ.
V
V
DIV
may be generated by a resistor divider between V
is symmetric around the DIVCODE midpoint.
+
DIV
Figure 1. Simple Technique for Setting DIVCODE
DIV
=
DIV
= 0.281 • 3.3V = 928mV ± 50mV.
DIVCODE
/V
.
+
ratio is accurate to ±1.5% (including resis-
DIV
16
and POL values for the recommended
LTC6991
+
0 5
.
GND
6991 F01
DIV
V
±
+
1 5
2.25V TO 5.5V
. %
+
supply voltage. The last
R1
R2
+
referenced 4-bit A/D
LTC6991
DIV
to the
6991f
+