DS1372U+ Maxim Integrated Products, DS1372U+ Datasheet - Page 8

IC BINARY COUNTER 32-BIT 8-USOP

DS1372U+

Manufacturer Part Number
DS1372U+
Description
IC BINARY COUNTER 32-BIT 8-USOP
Manufacturer
Maxim Integrated Products
Type
Binary Counterr
Datasheet

Specifications of DS1372U+

Time Format
Binary
Date Format
Binary
Interface
I²C, 2-Wire Serial
Voltage - Supply
2.4 V ~ 5.5 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
8-MSOP, Micro8™, 8-uMAX, 8-uSOP,
Counter Type
Binary Counters
Number Of Bits
32
Counting Sequence
Up/Down
Operating Temperature Range
- 40 C to + 85 C
Mounting Style
SMD/SMT
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Memory Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Bit 7: Oscillator Stop Flag (OSF). A logic 1 in this bit
indicates that the oscillator either is stopped or was
stopped for some period of time and may be used to
judge the validity of the timekeeping data. This bit is set
to logic 1 anytime the oscillator stops. The following are
examples of conditions that can cause the OSF bit to
be set:
This bit remains at logic 1 until written to logic 0.
Bits 6 to 1: These bits always read back as logic 0.
Bit 0: Alarm Flag (AF). A logic 1 in the AF bit indicates
that the alarm counter reached zero. If the AIE and
INTCN bits are both set to logic 1, the SQW/INT pin
goes low and remains low until AF is written to logic 0.
This bit can only be written to logic 0. Attempting to
write logic 1 leaves the value unchanged.
I
Figure 3. CRC Byte Polynomial
8
Bit #
Name
Reset
2
1) The first time power is applied.
2) The voltage present on V
3) The EOSC bit is turned off.
4) External influences on the crystal (i.e., noise, leak-
_______________________________________________________________________________________
C, 32-Bit, Binary Counter Clock with 64-Bit ID
port oscillation.
age, etc.) exist.
STAGE
1ST
X
0
OSF
7
1
STAGE
2ND
X
1
Status Register (08h)
CC
STAGE
3RD
X
6
0
0
2
is insufficient to sup-
STAGE
4TH
X
3
5
0
0
POLYNOMIAL = X
X
4
8
4
0
0
+ X
STAGE
A unique 64-bit lasered serial number is located in the
address range 09h–10h. This serial number is divided
into three parts. The first byte in register 09h contains a
model number to identify the DS1372 device type.
Registers 0Ah–0Fh contain a unique binary number.
Register 10h contains a CRC byte used to validate the
data in registers 09h–0Fh. All eight bytes of the serial
number are read-only registers. The CRC byte is gener-
ated with the polynomial equal to x
Figure 3).
The DS1372 is manufactured such that no two devices
contain an identical number in locations 0Ah–0Fh.
The DS1372 supports a bidirectional I
data transmission protocol (Figure 4). A device that
sends data onto the bus is defined as a transmitter,
and a device receiving data is defined as a receiver.
The device that controls the message is called a mas-
ter. The devices that are controlled by the master are
slaves. The bus must be controlled by a master device
that generates the serial clock (SCL), controls the
bus access, and generates the START and STOP
5
5TH
+ X
4
+ 1
X
3
0
0
5
STAGE
6TH
X
6
2
0
0
I
2
C Serial Data Bus
STAGE
7TH
X
7
Status Register (08h)
INPUT DATA
8
1
0
0
+ x
2
STAGE
C serial bus and
8TH
X
5
8
ID Register
+ x
4
+ 1 (see
AF
0
0

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